Programmable device with high reliability for a semiconductor device, display system, and electronic device
A novel semiconductor device is provided. The semiconductor device includes a programmable logic device including a programmable logic element, a control circuit, and a detection circuit. The programmable logic device includes a plurality of contexts. The control circuit is configured to control selection of the contexts. The detection circuit is configured to output a signal corresponding to the amount of radiation. The control circuit is configured to switch between a first mode and a second mode in accordance with the signal corresponding to the amount of radiation. The first mode is a mode in which the programmable logic device performs processing by a multi-context method, and the second mode is a mode in which the programmable logic device performs processing using a majority signal of signals output from the logic element multiplexed by the plurality of contexts.
1. A semiconductor device comprising:
a programmable logic device comprising a programmable logic element and a plurality of contexts;
a control circuit; and
a detection circuit,
wherein the control circuit is configured to control selection of the plurality of contexts,
wherein the detection circuit is configured to output a signal corresponding to an amount of radiation,
wherein the control circuit is configured to switch between a first mode and a second mode in accordance with the signal corresponding to the amount of radiation,
wherein the first mode is a mode in which the programmable logic device performs processing by a multi-context method, and
wherein the second mode is a mode in which the programmable logic device performs processing using a majority signal of a plurality of signals output from the logic element multiplexed by the plurality of contexts.
2. The semiconductor device according to claim 1 ,
wherein each of the plurality of contexts forms the same circuit in the second mode.
3. The semiconductor device according to claim 1 ,
wherein the detection circuit comprises a memory device and an inspection circuit,
wherein the memory device comprises a memory cell, and
wherein the inspection circuit is configured to generate the signal corresponding to the amount of radiation in accordance with whether there is a variation in data stored in the memory device.
4. The semiconductor device according to claim 3 ,
wherein the logic element comprises a memory circuit,
wherein the memory circuit and the memory cell each comprise a transistor and a capacitor,
wherein one of a source and a drain of the transistor is electrically connected to the capacitor, and
wherein the transistor comprises a metal oxide in a channel formation region.
5. The semiconductor device according to claim 1 ,
wherein the detection circuit comprises a memory device and an inspection circuit,
wherein the memory device comprises a memory cell configured to store multi-level data, and
wherein the inspection circuit is configured to generate the signal corresponding to the amount of radiation in accordance with whether there is a variation in the multi-level data stored in the memory cell.
6. A semiconductor device comprising:
a programmable logic device comprising a programmable logic element and a plurality of contexts;
a control circuit; and
a detection circuit,
wherein the control circuit is configured to control selection of the plurality of contexts,
wherein the detection circuit comprises a memory device,
wherein the memory device comprises memory cells,
wherein the detection circuit is configured to output a signal corresponding a first number of memory cells in which stored data has varied,
wherein the control circuit is configured to switch between a first mode and a second mode in accordance with the signal,
wherein the first mode is a mode in which the programmable logic device performs processing by a multi-context method, and
wherein the second mode is a mode in which the programmable logic device performs processing using a majority signal of a plurality of signals output from the logic element multiplexed by the plurality of contexts.
7. The semiconductor device according to claim 6 ,
wherein each of the plurality of contexts forms the same circuit in the second mode.
8. The semiconductor device according to claim 6 , wherein the memory cell is configured to store multi-level data.
9. The semiconductor device according to claim 6 ,
wherein the logic element comprises a memory circuit,
wherein the memory circuit and the memory cell each comprise a transistor and a capacitor,
wherein one of a source and a drain of the transistor is electrically connected to the capacitor, and
wherein the transistor comprises a metal oxide in a channel formation region.