IP Library › Granted Patent US 10,403,193
Granted Patent B2
US 10,403,193 · App. 15/709,196 · Granted Sep 3, 2019

Display device

Inventors: Yang Wan Kim (Yongin-si, KR); Su Jin Lee (Yongin-si, KR); Sun Ja Kwon (Yongin-si, KR); Byung Sun Kim (Yongin-si, KR); Hyun Ae Park (Yongin-si, KR); Hyung Jun Park (Yongin-si, KR); Jae Yong Lee (Yongin-si, KR); Yu Jin Jeon (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/2092G09G3/22G09G3/3233G09G2300/0408G09G2300/0413G09G2300/0426G09G2300/0439G09G2300/08G09G2300/0814G09G2300/0842G09G2300/0861G09G2300/0866G09G2310/0232G09G2310/0267
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Quick Facts
Patent No.
US 10,403,193
App. No.
15/709,196
Granted
Sep 3, 2019
Kind
B2
Abstract

An exemplary embodiment of the present disclosure provides a display device, including a substrate including a first pixel area, a second pixel area having a smaller area than the first pixel area and connected to the first pixel area, and a peripheral area surrounding the first pixel area and the second pixel area, a first pixel provided in the first pixel area and a second pixel provided in the second pixel area, a first line connected to the first pixel and a second line connected to the second pixel, a dummy part disposed in the peripheral area, overlapping with at least one of the first line and the second line, and providing a parasitic capacitance that compensate for a difference in a load value between the first line and the second line; and a power supply line provided in the first pixel area and the second pixel area, wherein the dummy part includes an insulating layer having at least one contact hole.

Claims (54)

1. A display device, comprising:

a substrate including a first pixel area, a second pixel area having a smaller area than the first pixel area and connected to the first pixel area, and a peripheral area surrounding the first pixel area and the second pixel area;

a first pixel provided in the first pixel area and a second pixel provided in the second pixel area;

a first line connected to the first pixel and a second line connected to the second pixel;

a dummy part disposed in the peripheral area, overlapping with at least one of the first line and the second line, and providing a parasitic capacitance that compensates for a difference in a load value between the first line and the second line; and

a power supply line provided in the first pixel area and the second pixel area,

wherein the dummy part includes an insulating layer having at least one contact hole, and

wherein the power supply line overlaps and extends through the first pixel area and the second pixel area and is connected to the dummy part.

2. The display device of claim 1 , wherein the dummy part further includes:

an active pattern provided on the substrate; and

a first metal layer provided on the insulating layer,

wherein the insulating layer is provided on the active pattern and a portion of the active pattern is exposed through the at least one contact hole, and

wherein the active pattern and the first metal layer are connected through the contact hole.

3. The display device of claim 2 , wherein the contact hole is provided in an overlapping area between the active pattern and the first metal layer.

4. The display device of claim 2 , wherein the first metal layer is connected to the power supply line.

5. The display device of claim 1 , wherein a fixed voltage is applied to the power supply line and the dummy part.

6. The display device of claim 1 , wherein the peripheral area includes:

a first peripheral area in a vicinity of the first pixel area;

a second peripheral area in a vicinity of the second pixel area; and

an additional peripheral area adjacent to the first pixel area and the second peripheral area.

7. The display device of claim 6 , wherein the dummy part is disposed in the second peripheral area.

8. The display device of claim 2 , wherein the dummy part further includes a second metal layer disposed between the active pattern and the first metal layer.

9. The display device of claim 1 , wherein the insulating layer further includes a dummy contact hole.

10. The display device of claim 1 , wherein a density of elements disposed in the dummy part is similar to a density of elements disposed in the second pixel that is disposed closest to the dummy part in the second pixel area.

11. The display device of claim 1 , wherein the dummy part includes at least two sub-dummy parts separated from each other by a distance.

12. The display device of claim 11 , wherein the at least two sub-dummy parts are connected to each other by a coupling pattern.

13. The display device of claim 12 , wherein the coupling pattern is provided between the second metal layer and the first metal layer.

14. The display device of claim 2 , further comprising:

a passivation layer provided on the first metal layer;

a pixel defining layer provided on the passivation layer; and

a sealing layer covering portions of the first pixel area, the second pixel area, and a portion of the peripheral area and including an inorganic material.

15. The display device of claim 14 , wherein the passivation layer and the pixel defining layer have a valley formed by removing portions of the passivation layer and the pixel defining layer along circumferences of the first pixel area and the second pixel area.

16. The display device of claim 15 , wherein the valley is formed at a position corresponding to the coupling pattern.

17. The display device of claim 14 , wherein the sealing layer covers side surfaces of the passivation layer and the pixel defining layer.

18. The display device of claim 1 , wherein the first line is a first scan line extending in a first direction on the substrate and supplying a scan signal to the first pixel, and the second line is a second scan line extending in the first direction and supplying a scan signal to the second pixel.

19. The display device of claim 18 , wherein a length of the first scan line is greater than a length of the second scan line.

20. The display device of claim 18 , wherein the second scan line extends to the second peripheral area and overlaps with the dummy part.

21. The display device of claim 20 , wherein the second scan line extending to the second peripheral area is integrally formed with the second metal layer in a single body.

22. The display device of claim 18 , further comprising a first emission control line connected to the first pixel and a second emission control line connected to the second pixel.

23. The display device of claim 22 , wherein the second emission control line extends to the second peripheral area and overlaps with the dummy part.

24. The display device of claim 18 , further comprising a data line extending in a second direction that crosses the first direction on the substrate,

wherein the data line is separated from the power supply line.

25. The display device of claim 24 , wherein the second pixel includes a transistor connected to the second scan line and the data line, and

wherein the transistor includes:

an active pattern provided on the substrate;

a gate electrode provided on the active pattern with a gate insulating layer interposed therebetween;

an interlayer insulating layer including a first interlayer insulating layer covering the gate electrode and a second interlayer insulating layer disposed on the first interlayer insulating layer; and

a source electrode and a drain electrode disposed on the interlayer insulating layer and connected to the active pattern.

26. The display device of claim 1 , wherein the substrate further comprises a third pixel area separated from the second pixel area and connected to the first pixel area and a third peripheral area surrounding the third pixel area.

27. The display device of claim 26 , wherein the dummy part is disposed in the third peripheral area.

28. The display device of claim 27 , further comprising:

a third pixel provided in the third pixel area; and

a third scan line supplying a scan signal to the third pixel,

wherein the third scan line extends to the third peripheral area and overlaps with the dummy part.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2017
From: KIM, YANG WAN; LEE, SU JIN; KWON, SUN JA; KIM, BYUNG SUN; PARK, HYUN AE; PARK, HYUNG JUN; LEE, JAE YONG; JEON, YU JIN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 043921/0261 →
Priority Claims (1)
KR 10-2016-0121559 · Sep 22, 2016 · national
Continuity (1)
Related Publication 20180082630A1 · Mar 22, 2018
Cited By (3)
US 12,217,675 US 12,604,619 US 12,610,726