Chip handling and electronic component integration
Small size chip handling and electronic component integration are accomplished using handle fixturing to transfer die or other electronic components from a full area array to a targeted array. Area array dicing of a thinned device wafer on a handle wafer/panel may be followed by selective or non-selective de-bonding of targeted die or electronic components from the handle wafer and optional attachment to a carrier such as a transfer head or tape. Alignment fiducials may facilitate precision alignment of the transfer head or tape to the device wafer and subsequently to the targeted array. Alternatively, the dies or other electronic elements are transferred selectively from either a carrier or the device wafer to the targeted array.
1. An assembly for integrating electronic elements into an electronic package assembly, comprising:
a semiconductor structure including:
a device wafer comprising an array of singulated electronic elements, the singulated electronic elements including a plurality of targeted electronic elements,
a handle wafer bonded to the device wafer,
one or more first alignment markers, the targeted electronic elements being located at selected distances from the one or more first alignment markers, and
a release layer between the device wafer and the handle wafer;
a carrier assembly including one or more second alignment markers and selected surface areas configured for attaching the targeted electronic elements, the selected surface areas being configured for alignment with the targeted electronic elements when the one or more first alignment markers are aligned with the one or more second alignment markers;
an electromagnetic radiation source configured to direct electromagnetic radiation through the handle wafer, at least one of the electromagnetic radiation source and the handle wafer being configured to allow ablation of discrete, selected portions of the release layer beneath and corresponding to the targeted plurality of the singulated electronic elements using the electromagnetic radiation source;
an electronic package assembly include one or more third alignment markers and a plurality of targeted bonding sites, the selected surface areas of the carrier assembly being configured for alignment with the targeted bonding sites when the one or more second alignment markers are aligned with the one or more third alignment markers.
2. The assembly of claim 1 , wherein the carrier assembly comprises a precision wafer transfer head including a rigid body portion and the selected surface areas comprise a plurality of discrete raised regions extending from the body portion.
3. The assembly of claim 2 , wherein the surface areas of the discrete raised regions of the precision wafer transfer head are about the same as the surface areas of the targeted electronic elements that are alignable therewith.
4. The assembly of claim 1 , wherein the carrier assembly includes a flexible tape having an adhesive surface comprising the selected surface areas.
5. The assembly of claim 4 , wherein the carrier assembly further includes a precision wafer transfer head including a rigid body portion and a plurality of discrete raised regions extending from the body portion, the discrete raised regions corresponding to and being alignable with the selected surface areas of the flexible tape.
6. The assembly of claim 1 , wherein the precision wafer transfer head includes the second alignment markers.
7. The assembly of claim 1 , wherein the handle wafer is configured to allow ablation of discrete, selected portions of the release layer, the handle wafer including a patterned mask including openings aligned with the targeted electronic elements to allow ablation of discrete, selected portions of the release layer beneath the targeted electronic elements using electromagnetic radiation from the electromagnetic radiation source.
8. The assembly of claim 1 , further including spaces within the release layer between the targeted electronic elements.
9. An assembly for integrating electronic elements into an electronic package assembly, comprising:
a semiconductor structure including:
a device wafer comprising an array of singulated electronic elements, the singulated electronic elements including a plurality of targeted electronic elements,
a handle wafer bonded to the device wafer and including one or more first alignment markers, the targeted electronic elements being located at selected distances from the one or more first alignment markers, and
a release layer between the device wafer and the handle wafer;
an electromagnetic radiation source configured to direct electromagnetic radiation through the handle wafer, at least one of the electromagnetic radiation source and the handle wafer being configured to allow ablation of discrete, selected portions of the release layer beneath and corresponding to the targeted electronic elements using the electromagnetic radiation source; and
an electronic package assembly including one or more second alignment markers and a plurality of targeted bonding sites, the targeted bonding sites being configured for alignment with the targeted electronic elements when the one or more first alignment markers are aligned with the one or more second alignment markers.
10. The assembly of claim 9 , wherein the electronic package assembly includes a second handle wafer and singulated electronic packages attached to the second handle wafer, the electronic packages including the targeted bonding sites and being in opposing relation to the device wafer such that the targeted bonding sites are aligned with the targeted electronic elements.
11. The assembly of claim 9 , wherein the handle wafer is configured to allow ablation of the discrete, selected portions of the release layer, the handle wafer including a patterned mask including openings aligned with the targeted electronic elements, the electromagnetic radiation source being configured to direct electromagnetic radiation through the openings in the patterned mask.
12. The assembly of claim 9 , wherein the handle wafer is a round wafer comprising glass or silicon.
13. The assembly of claim 9 , wherein the release layer does not extend over the handle wafer between the targeted electronic elements.