IP Library › Granted Patent US 10,147,752
Granted Patent B2
US 10,147,752 · App. 15/710,419 · Granted Dec 4, 2018

Back-side illuminated (BSI) image sensor with global shutter scheme

Inventors: Chun-Yuan Chen (Tainan, TW); Ching-Chun Wang (Tainan, TW); Dun-Nian Yaung (Taipei, TW); Shyh-Fann Ting (Tainan, TW); Wei Chuang Wu (Tainan, TW); Yen-Ting Chiang (Tainan, TW); Kuan-Tsun Chen (Tainan, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L27/14629H01L27/1464H01L27/14623H01L27/14636H01L27/14645H01L27/14685H01L27/14689H01L27/14609H01L27/14621H01L27/14627
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Quick Facts
Patent No.
US 10,147,752
App. No.
15/710,419
Granted
Dec 4, 2018
Kind
B2
Abstract

In some embodiments, the present disclosure relates to a method of forming a back-side image (BSI) sensor. The method may be performed by forming an image sensing element within a substrate and forming a pixel-level memory node at a position within the substrate that is laterally offset from the image sensing element. A back-side of the substrate is etched to form one or more trenches that are laterally separated from the image sensing element by the substrate and that vertically overlie the pixel-level memory node. A reflective material is formed within the one or more trenches.

Claims (44)

1. A method of forming a back-side illuminated (BSI) image sensor, comprising:

forming an image sensing element within a substrate;

forming a pixel-level memory node at a position within the substrate that is laterally offset from the image sensing element;

etching a back-side of the substrate to form one or more trenches that are laterally separated from the image sensing element by the substrate and that vertically overlie the pixel-level memory node; and

forming a reflective material within the one or more trenches.

2. The method of claim 1 , further comprising:

performing a planarization process to remove a part of the reflective material outside of the one or more trenches.

3. The method of claim 1 , further comprising:

forming a plurality of metal interconnect layers within a dielectric structure prior to etching the back-side of the substrate, wherein the dielectric structure is arranged along a front-side of the substrate opposing the back-side of the substrate.

4. The method of claim 3 , further comprising:

bonding the dielectric structure to a carrier substrate; and

reducing a thickness of the substrate after bonding the dielectric structure to the carrier substrate.

5. The method of claim 1 , wherein the reflective material comprises a metal.

6. The method of claim 1 , wherein the reflective material is deposited by way of a deposition process and a plating process.

7. The method of claim 1 , wherein the reflective material comprises a multi-layer reflective film formed by a series of deposition processes.

8. The method of claim 1 , further comprising:

forming a passivation layer onto the back-side of the substrate and onto the reflective material.

9. The method of claim 1 , wherein the reflective material extends from the substrate to a horizontal plane extending along the back-side of the substrate.

10. The method of claim 1 , wherein the reflective material is separated from the image sensing element by the substrate.

11. A method of forming an image sensor, comprising:

forming an image sensing element within a substrate;

forming a memory node within the substrate, wherein the memory node is laterally separated from the image sensing element;

forming a masking layer along a back-side of the substrate over the image sensing element;

etching the back-side of the substrate according to the masking layer to define one or more trenches directly between the memory node and a horizontal plane extending along the back-side of the substrate; and

forming a reflective material within the one or more trenches.

12. The method of claim 11 , further comprising:

forming an inter-level dielectric (ILD) layer along a front-side of the substrate facing an opposite direction as the back-side of the substrate;

patterning the ILD layer to define an opening within the ILD layer; and

forming a conductive material within the opening.

13. The method of claim 11 , wherein the memory node is separated from the reflective material by the substrate.

14. The method of claim 11 , wherein the reflective material comprises copper or aluminum.

15. The method of claim 11 , further comprising:

forming a passivation layer contacting the back-side of the substrate and the reflective material.

16. The method of claim 11 , wherein the reflective material completely fills the one or more trenches from the substrate to the horizontal plane extending along the back-side of the substrate.

17. The method of claim 11 , wherein the reflective material is laterally separated from the image sensing element by the substrate.

18. A method of forming a back-side illuminated (BSI) image sensor, comprising:

forming an image sensing element within a substrate;

forming a memory node at a position within the substrate separated from the image sensing element;

forming a dielectric structure surrounding one or more interconnect layers on a first side of the substrate; and

forming a reflective material along a second side of the substrate facing an opposite direction as the first side, wherein the reflective material has sidewalls defining an aperture that is directly over the image sensing element.

19. The method of claim 18 , further comprising:

etching the second side of the substrate to form one or more trenches that are laterally separated from the image sensing element by the substrate and that are vertically between the memory node and a horizontal plane extending along the second side of the substrate; and

forming the reflective material within the one or more trenches.

20. The method of claim 19 , wherein the reflective material extends from the substrate to the horizontal plane extending along the second side of the substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2017
From: CHEN, CHUN-YUAN; WANG, CHING-CHUN; YAUNG, DUN-NIAN; TING, SHYH-FANN; WU, WEI CHUANG; CHIANG, YEN-TING; CHEN, KUAN-TSUN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 043642/0260 →
Continuity (3)
Division 15149497 · May 9, 2016
Provisional Application 62246349 · Oct 26, 2015
Related Publication 20180026066A1 · Jan 25, 2018
Cited By (1)
US 12,628,450