Analog-to-digital converter and image sensor having the same

1. An analog-to-digital converter configured to convert an analog signal into a digital signal, the analog-to-digital converter comprising:

a first converter configured to operate in a first mode to receive a first input signal of an analog type, compare the first input signal with a plurality of reference signals, select one out of the plurality of reference signals based on the comparison, and output at least one upper bit value that is at least a portion of the digital signal based on the selected reference signal;

a second converter configured to operate in a second mode to perform an oversampling operation n times based on a residue signal, where n is an integer, the residue signal indicating a difference between an upper analog signal corresponding to the at least one upper bit value and the first input signal, and output an intermediate bit value of the digital signal corresponding to first to n-th oversampling signals generated respectively during the oversampling operations performed n times; and

a third converter configured to operate in a third mode to output at least one lower bit value of the digital signal corresponding to the n-th oversampling signal,

wherein the analog-to-digital converter is configured to operate on the first input signal in the first mode, the second mode, and the third mode sequentially,

wherein the analog-to-digital converter is further configured to receive a second input signal of an analog type after the first input signal, and to convert the second input signal into a second digital signal,

wherein the third converter is configured to operate in the third mode on the first input signal contemporaneously with the first converter operating on the second input signal in the first mode and the second converter operating on the second input signal in the second mode.

2. The analog-to-digital converter of claim 1 , wherein the first converter is configured to perform a successive approximation operation to compare a magnitude of the first input signal with magnitudes of reference signals and output the at least one upper bit value based on the comparison.

3. The analog-to-digital converter of claim 2 , wherein the first converter includes a register configured to store the at least one upper bit value, the at least one upper bit value being obtained by performing the successive approximation operation, and the first converter is configured to transmit the at least one upper bit value to the second converter when the second converter operates in the second mode.

4. The analog-to-digital converter of claim 1 , wherein the first converter includes a flash analog-to-digital converter.

5. The analog-to-digital converter of claim 1 , further comprising

an adder configured to synthesize the upper bit value, the intermediate bit value, and the lower bit value, and to generate the digital signal.

6. The analog-to-digital converter of claim 1 , wherein the third converter is configured to operate in the third mode on the first input signal after the first mode and second mode operations on the first input signal end.

7. An image sensor comprising:

a pixel array including a plurality of pixels connected to column lines, the plurality of pixels being configured to respectively sense incident light and generate analog signals through the column lines; and

an analog-to-digital converter connected to at least one of the column lines and configured to convert the analog signals into digital signals,

wherein the analog-to-digital converter includes,

an upper bit converter configured to receive a first input signal from among the analog signals, compare a plurality of reference signals with the first input signal by successive approximation, select one out of the plurality of reference signals, and output at least one upper bit value that is at least a portion of the digital signal based on the selected reference signal, and

a lower bit converter configured to perform an oversampling operation n times based on a residue signal, where n is an integer, the residue signal being a difference value between an upper analog signal corresponding to the at least one upper bit value and the first input signal, the lower bit converter configured to output at least one lower bit value of the digital signal corresponding to the residue signal,

wherein the lower bit converter comprises:

a first lower bit converter configured to perform an oversampling operation n times based on the residue signal, the residue signal being the difference value between the upper analog signal and the first input signal, and output a first lower bit value corresponding to first to n-th oversampling signals generated respectively, during the oversampling operations performed n times; and

a second lower bit converter configured to output a second lower bit value corresponding to the n-th oversampling signal,

wherein, while the second lower bit converter is configured to perform an operation on the first input signal, at least one of the upper bit converter and the first lower bit converter is configured to perform a conversion operation on a second input signal from among the analog signals received after the first input signal.

8. The image sensor of claim 7 , wherein the lower bit converter comprises a delta-sigma analog-to-digital converter.

9. The image sensor of claim 7 , wherein the second lower bit converter is configured to receive the n-th oversampling signal and start operating after operations of the upper bit converter and the first lower bit converter on the first input signal end.

10. The image sensor of claim 7 , wherein the second lower bit converter comprises a switching unit configured to control input of the n-th oversampling signal,

wherein the switching unit is turned on while the upper bit converter and the first lower bit converter are performing a conversion operation on the second input signal.

11. The image sensor of claim 7 , wherein the second lower bit converter comprises a single-slope analog-to-digital converter.

12. An electronic device comprising:

a converter configured to,

operate in a successive approximation mode to generate at least one of a plurality of upper bit values of an input signal,

generate an upper analog signal by converting the plurality of upper bit values,

generate a residue signal by subtracting the upper analog signal from the input signal,

amplify the residue signal, and

operate in a delta-sigma mode to generate at least one of a plurality of lower bit values of the input signal by performing an oversampling operation n times, where n is an integer,

wherein the converter is configured to operate in a single-slope mode to output a least significant bit corresponding to an nth oversampling signal, the nth oversampling signal generated after the oversampling operation n times in the delta-sigma mode,

wherein the input signal includes a first input signal and a second input signal,

wherein the converter is configured to receive the second input signal after the first input signal, and operate in the successive approximation mode on the second input signal contemporaneously with operating in the single-slope mode on the first input signal.

13. The electronic device of claim 12 , wherein the converter includes:

an adder configured to receive at least one of the plurality of upper bit values, at least one of the plurality of lower bit values, and the least significant bit, to synthesize a digital signal corresponding to a sum of the plurality of upper bit values, the plurality of lower bit values, and the least significant bit, and to output the digital signal.

14. The electronic device of claim 12 , wherein the input signal is an analog input signal corresponding to an intensity of light incident on a pixel array.