Techniques for dynamic multi-storage format database access
Techniques and apparatus for providing access to data in a plurality of storage formats are described. In one embodiment, for example, an apparatus may include logic, at least a portion of comprised in hardware coupled to the at least one memory, to determine a first storage format of a database operation on a database having a second storage format, and perform a format conversion process responsive to the first storage format being different than the second storage format, the format conversion process to translate a virtual address of the database operation to a physical address, and determine a converted physical address comprising a memory address according to the first storage format. Other embodiments are described and claimed.
1. An apparatus, comprising:
processor circuitry coupled to at least one memory, the processor circuitry to:
determine a first storage format of a database operation on a database having a second storage format, and
perform a format conversion process responsive to the first storage format being different than the second storage format, the format conversion process to:
translate a virtual address of the database operation to a physical address, and
determine a converted physical address from the physical address using acceleration logic, stride logic or advanced conversion logic, the converted physical address comprising a memory address according to the first storage format.
2. The apparatus of claim 1 , the first storage format comprising one of a column-oriented storage format or a row-oriented storage format.
3. The apparatus of claim 1 , the second storage format comprising one of a column-oriented storage format or a row-oriented storage format, the second storage format being different than the first storage format.
4. The apparatus of claim 1 , the processor circuitry to determine one of a plurality of virtual address spaces addressed by the virtual address.
5. The apparatus of claim 1 , the processor circuitry to determine one of a plurality of virtual address spaces addressed by the virtual address, each of the plurality of virtual address spaces for a different storage format.
6. The apparatus of claim 1 , the processor circuitry to determine the first storage format of the database operation based on a type of a virtual address space addressed by the virtual address.
7. The apparatus of claim 1 , the virtual address addressed to one of a plurality of virtual address spaces for a physical memory storing the database, the one of the plurality of virtual address spaces having the first storage format.
8. The apparatus of claim 1 , the processor circuitry to perform the format conversion process to translate the virtual address to a physical address using a translation look buffer (TLB) translation or a page table translation.
9. A computer-implemented method, comprising:
determining a first storage format of a database operation on a database having a second storage format; and
performing a format conversion process responsive to the first storage format being different than the second storage format, the format conversion process comprising:
translating a virtual address of the database operation to a physical address, and
determining a converted physical address from the physical address using acceleration logic, stride logic or advanced conversion logic, the converted physical address comprising a memory address according to the first storage format.
10. The method of claim 9 , the first storage format comprising one of a column-oriented storage format or a row-oriented storage format.
11. The method of claim 9 , the second storage format comprising one of a column-oriented storage format or a row-oriented storage format, the second storage format being different than the first storage format.
12. The method of claim 9 , comprising determining one of a plurality of virtual address spaces addressed by the virtual address.
13. The method of claim 9 , comprising determining one of a plurality of virtual address spaces addressed by the virtual address, each of the plurality of virtual address spaces for a different storage format.
14. The method of claim 9 , comprising determining the first storage format of the database operation based on a type of a virtual address space addressed by the virtual address.
15. The method of claim 9 , the virtual address addressed to one of a plurality of virtual address spaces for a physical memory storing the database, the one of the plurality of virtual address spaces having the first storage format.
16. The method of claim 9 , comprising performing the format conversion process to translate the virtual address to a physical address using a translation look buffer (TLB) translation or a page table translation.
17. A non-transitory computer-readable storage medium, comprising a plurality of instructions that, when executed, enable processing circuitry to:
determine a first storage format of a database operation on a database having a second storage format; and
perform a format conversion process responsive to the first storage format being different than the second storage format, the format conversion process to:
translate a virtual address of the database operation to a physical address, and
determine a converted physical address from the physical address using acceleration logic, stride logic or advanced conversion logic, the converted physical address comprising a memory address according to the first storage format.
18. The computer-readable storage medium of claim 17 , the first storage format comprising one of a column-oriented storage format or a row-oriented storage format.
19. The computer-readable storage medium of claim 17 , the second storage format comprising one of a column-oriented storage format or a row-oriented storage format, the second storage format being different than the first storage format.
20. The computer-readable storage medium of claim 17 , the plurality of instructions, when executed, to enable the processing circuitry to determine one of a plurality of virtual address spaces addressed by the virtual address.
21. The computer-readable storage medium of claim 17 , the plurality of instructions, when executed, to enable the processing circuitry to determine one of a plurality of virtual address spaces addressed by the virtual address, each of the plurality of virtual address spaces for a different storage format.