Flexible semiconductor package
View Patent ↗Implementations of semiconductor packages may include a die including a first side and a second side opposing the first side, the second side of the die coupled to a layer, a first end of a plurality of wires each bonded to the first side of the die, a mold compound encapsulating the die and the plurality of wires, and a second end of the plurality of wires each directly bonded to one of a plurality of bumps, wherein a surface of the layer is exposed through the mold compound.
1. A semiconductor package comprising:
a die comprising a first side and a second side opposing the first side, the second side of the die coupled to a layer;
a first end of a plurality of wires each bonded to the first side of the die;
a mold compound encapsulating the die and the plurality of wires, wherein the mold compound comprises a first side and a second side opposite the first side; and
a second end of the plurality of wires each directly bonded to one of a plurality of bumps located outside of the mold compound and coupled directly to the second side of the mold compound;
wherein the second end of the plurality of wires extends to an outer surface of the mold compound;
wherein a surface of the layer is exposed through the second side of the mold compound; and
wherein a plurality of sidewalls of the mold compound are substantially perpendicular to the surface of the layer exposed through the mold compound.
2. The semiconductor package of claim 1 , wherein the layer is a die flag.
3. The semiconductor package of claim 1 , wherein the layer is a non-electrically conductive layer.
4. The semiconductor package of claim 1 , wherein the layer is an electrically conductive layer.
5. The semiconductor package of claim 1 , wherein the semiconductor package does not comprise a lead frame.
6. The semiconductor package of claim 1 , wherein five faces of the semiconductor package are entirely covered by the mold compound.