IP Library Granted Patent US 10,281,940
Granted Patent B2
US 10,281,940 · App. 15/725,579 · Granted May 7, 2019

Low dropout regulator with differential amplifier

Inventors: Tsung-Han Yang (Hsin-Chu, TW); Chia-So Chuang (Hsin-Chu, TW)
Assignee: PIXART IMAGING INC.
G05F1/575G05F1/59G05F1/56
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Quick Facts
Patent No.
US 10,281,940
App. No.
15/725,579
Granted
May 7, 2019
Kind
B2
Abstract

A low dropout regulator provided includes: an impedance unit; a differential amplifier being electrically connected to the impedance unit; a current mirror unit being electrically connected to the differential amplifier; and an adaptive bias unit being electrically connected to the differential amplifier and the current mirror unit. The impedance unit is electrically connected to a negative feedback route of the differential amplifier to make a gain of the negative feedback route greater than a gain of a positive feedback route of the differential amplifier.

Claims (49)

1. A low dropout regulator comprising:

an impedance unit;

a differential amplifier being electrically connected to the impedance unit;

a current mirror unit being electrically connected to the differential amplifier; and

an adaptive bias unit being electrically connected to the differential amplifier and the current mirror unit;

wherein the impedance unit is electrically connected to a negative feedback route of the differential amplifier to make a gain of the negative feedback route greater than a gain of a positive feedback route of the differential amplifier.

2. The low dropout regulator of claim 1 , wherein the differential amplifier includes:

a first transistor having a source electrode, a drain electrode, and a gate electrode;

a second transistor having a source electrode connected to the source electrode of the first transistor;

a third transistor having a drain electrode connected to the drain electrode of the first transistor; and

a fourth transistor having a gate electrode connected to a gate electrode of the third transistor and connected to a drain electrode of the fourth transistor, a source electrode connected to the impedance unit, and a drain electrode connected to the gate electrode of the fourth transistor and a drain electrode of the second transistor;

wherein the source electrode of the first transistor and the source electrode of the second transistor are connected to a first bias current.

3. The low dropout regulator of claim 2 , wherein the current mirror unit includes:

a fifth transistor having a drain electrode connected to the source electrode of the second transistor;

a sixth transistor having a gate electrode connected to a gate electrode of the fifth transistor and connected to a drain electrode of the sixth transistor; and

a seventh transistor having a gate electrode connected to the drain electrode of the third transistor and a drain electrode connected to the drain electrode of the sixth electrode.

4. The low dropout regulator of claim 3 , wherein the adaptive bias unit includes:

an eighth transistor having a gate electrode connected to a drain electrode of the eighth transistor; and

a ninth transistor having a gate electrode connected to the gate electrode of the third electrode and a drain electrode connected to the drain electrode of the eighth transistor.

5. The low dropout regulator of claim 3 , wherein the adaptive bias unit includes:

an eighth transistor having a source electrode, a drain electrode, and a gate electrode;

a ninth transistor having a gate electrode connected to the gate electrode of the third electrode and a drain electrode connected to the drain electrode of the eighth transistor;

a tenth transistor having a drain electrode being connected to the gate electrode of the second transistor and a gate electrode being connected to the drain electrode of the eighth transistor; and

an eleventh transistor having a gate electrode connected to the drain electrode of the third transistor and a drain electrode connected to the drain electrode of the tenth transistor.

6. The low dropout regulator of claim 1 , wherein the impedance unit is a resistor.

7. A low dropout regulator comprising:

an impedance unit;

a differential amplifier being electrically connected to the impedance unit; and

an adaptive bias unit being electrically connected to the differential amplifier;

wherein the impedance unit is electrically connected to a negative feedback route of the differential amplifier to make a gain of the negative feedback route greater than a gain of a positive feedback route of the differential amplifier,

wherein the differential amplifier includes:

a first transistor having a source electrode, a drain electrode, and a gate electrode;

a second transistor having a source electrode connected to the source electrode of the first transistor;

a third transistor having a drain electrode connected to the drain electrode of the first transistor; and

a fourth transistor having a gate electrode connected to a gate electrode of the third transistor, a drain electrode connected to the gate of the fourth transistor and a drain electrode of the second transistor connected to the impedance unit;

wherein the source electrode of the first transistor and the source electrode of the second transistor are connected to a first bias current.

8. The low dropout regulator of claim 7 , wherein the adaptive bias unit includes:

a seventh transistor having a gate electrode connected to the drain electrode of the third transistor and a drain electrode connected to a second bias current.

9. The low dropout regulator of claim 7 , wherein the impedance unit is a resistor.

10. A low dropout regulator comprising:

an impedance unit; and

a differential amplifier with symmetric structure, the differential amplifier being electrically connected to an impedance unit;

wherein the impedance unit is electrically connected to a negative feedback route of the differential amplifier to make a gain of the negative feedback route greater than a gain of a positive feedback route of the differential amplifier, and

wherein the differential amplifier includes:

a first transistor having a source electrode, a drain electrode, and a gate electrode;

a second transistor having a source electrode connected to the source electrode of the first transistor;

a third transistor having a drain electrode connected to the drain electrode of the first transistor; and

a fourth transistor having a gate electrode connected to a gate electrode of the third transistor, a drain electrode connected to the gate of the fourth transistor and a drain electrode of the second transistor connected to the impedance unit;

wherein the source electrode of the first transistor and the source electrode of the second transistor are connected to a first bias current.

Assignments (3)
MERGER Recorded Oct 20, 2022
From: AUDIOWISE TECHNOLOGY INC.
To: AIROHA TECHNOLOGY CORP.
Reel/Frame 061482/0604 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2019
From: PIXART IMAGING INC.
To: AUDIOWISE TECHNOLOGY INC.
Reel/Frame 049457/0704 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2017
From: YANG, TSUNG-HAN; CHUANG, CHIA-SO
To: PIXART IMAGING INC.
Reel/Frame 043796/0029 →
Continuity (1)
Related Publication 20190107855A1 · Apr 11, 2019