IP Library Granted Patent US 10,497,678
Granted Patent B2
US 10,497,678 · App. 15/726,471 · Granted Dec 3, 2019

Semiconductor package assembly with passive device

Inventors: Che-Hung Kuo (Tainan, TW); Ying-Chih Chen (Kaohsiung, TW); Che-Ya Chou (Kaohsiung, TW)
Assignee: MediaTek Inc.
H01L25/0657H01L25/16H01L23/3128H01L24/05H01L24/06H01L24/32H01L24/73H01L25/0652H01L2224/0401H01L2224/04042H01L2224/04105H01L2224/05554H01L2224/06135H01L2224/12105H01L2224/16145H01L2224/16227H01L2224/32225H01L2224/4824H01L2224/48091H01L2224/48145H01L2224/48227H01L2224/48265H01L2224/73215H01L2224/73253H01L2224/73265H01L2225/0651H01L2225/06506H01L2225/06513H01L2225/06517H01L2225/06568H01L2225/06572H01L2225/06582H01L2924/1431H01L2924/1432H01L2924/1436H01L2924/15311H01L2924/16235H01L2924/19041H01L2924/19042H01L2924/19043H01L2924/19104H01L2924/19105H01L2924/19107
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Quick Facts
Patent No.
US 10,497,678
App. No.
15/726,471
Granted
Dec 3, 2019
Kind
B2
Abstract

A semiconductor package assembly includes a first substrate. A first semiconductor die is disposed on the first substrate. A passive device is located directly on the first semiconductor die. The passive device is disposed within a boundary of the first semiconductor die in a plan view.

Claims (13)

1. A semiconductor package assembly, comprising:

a first substrate;

a first semiconductor die disposed on the first substrate;

a passive device located directly above the first semiconductor die, wherein the passive device is disposed within a boundary of the first semiconductor die in a plan view, and pads of the passive device are attached to sidewalls of the passive device;

a second semiconductor die directly on the first semiconductor die, wherein the passive device is disposed beside the second semiconductor die; and

an insulating brick, wherein the second semiconductor die is embedded in the insulating brick and separated from the passive device,

wherein the pads of the passive device connect directly to pads of the first semiconductor die.

2. A semiconductor package assembly, comprising:

a first substrate;

a first semiconductor die disposed on the first substrate;

a discrete passive device located directly above and fully overlapping the first semiconductor die, wherein an overlapping region between the discrete passive device and the first semiconductor die is surrounded by a side surface of the first semiconductor die in a plan view, and pads of the discrete passive device are attached to sidewalls of the discrete passive device; and

a second semiconductor die directly on the first semiconductor die and beside the discrete passive device, wherein the second semiconductor die is embedded in an insulating brick and separated from the discrete passive device,

wherein the pads of the discrete passive device connect directly to pads of the first semiconductor die.

Assignments (2)
CONFIRMATORY LICENSE Recorded Mar 6, 2018
From: TEXAS ENGINEERING EXPERIMENT STATION
To: NATIONAL INSTITUTES OF HEALTH (NIH), U.S. DEPT. OF HEALTH AND HUMAN SERVICES (DHHS), U.S. GOVERNMENT
Reel/Frame 045504/0439 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2017
From: KUO, CHE-HUNG; CHEN, YING-CHIH; CHOU, CHE-YA
To: MEDIATEK INC
Reel/Frame 043802/0278 →
Continuity (4)
Division 15012018 · Feb 1, 2016
Provisional Application 62135322 · Mar 19, 2015
Provisional Application 62130048 · Mar 9, 2015
Related Publication 20180033774A1 · Feb 1, 2018