IP Library Granted Patent US 10,326,043
Granted Patent B2
US 10,326,043 · App. 15/729,487 · Granted Jun 18, 2019

Solid-state transducer devices with optically-transmissive carrier substrates and related systems, methods, and devices

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Quick Facts
Patent No.
US 10,326,043
App. No.
15/729,487
Granted
Jun 18, 2019
Kind
B2
Abstract

Semiconductor device assemblies having solid-state transducer (SST) devices and associated semiconductor devices, systems, and are disclosed herein. In one embodiment, a method of forming a semiconductor device assembly includes forming a support substrate, a transfer structure, and a plurality semiconductor structures between the support substrate and the transfer structure. The method further includes removing the support substrate to expose an active surface of the individual semiconductor structures and a trench between the individual semiconductor structures. The semiconductor structures can be attached to a carrier substrate that is optically transmissive such that the active surface can emit and/or receive the light through the carrier substrate. The individual semiconductor structures can then be processed on the carrier substrate with the support substrate removed. In some embodiments, the individual semiconductor structures are singulated from the semiconductor device assembly and include a section of the carrier substrate attached to each of the individual semiconductor structures.

Claims (37)

1. A method of forming a semiconductor device assembly, the method comprising:

providing a semiconductor device assembly including a support substrate, a semiconductor structure attached to the support substrate, and conductive material attached to the semiconductor structure;

forming at least one trench that extends through the semiconductor structure to form individual semiconductor devices, the individual semiconductor devices being attached to one another via the support substrate, wherein the at least one trench separates the individual semiconductor devices from one another, and wherein the individual semiconductor devices include a first side adjacent the conductive material, and a second side opposite the first side and adjacent the support substrate;

after forming the at least one trench, attaching a transfer structure to the conductive material at the first side of the individual semiconductor devices;

after attaching the transfer structure, removing the support substrate from the individual semiconductor devices using a chemical etchant;

after removing the support substrate, coupling a carrier substrate to an active surface of the individual semiconductor devices at the second side of the individual semiconductor devices, wherein the carrier substrate is optically transmissive to light; and

processing the individual semiconductor devices on the carrier substrate.

2. The method of claim 1 , further comprising, prior to coupling the carrier substrate, roughening the active surface of the individual semiconductor devices to improve light emission efficiency therefrom.

3. The method of claim 1 wherein coupling a carrier substrate comprises:

disposing an optically-transmissive intermediary material over the active surface of the individual semiconductor devices; and

attaching the carrier substrate to the intermediary material.

4. The method of claim 1 , further comprising forming openings in the conductive material such that portions of the semiconductor material of the individual semiconductor devices are exposed, wherein forming the openings separates the conductive material of the individual semiconductor devices into a first contact and a second contact.

5. The method of claim 4 wherein attaching a transfer structure comprises attaching the transfer structure to contact surfaces of the first and second contacts, wherein the transfer structure covers the first and second contacts and the one or more trenches.

6. The method of claim 1 wherein processing the individual semiconductor devices comprises singulating the semiconductor device assembly along dicing lines generally aligned with the at least one trench.

7. The method of claim 1 wherein the at least one trench includes at least one first trench, and wherein processing the individual semiconductor devices comprises forming at least one second trench extending through the carrier substrate to form sections of the carrier substrate, wherein the at least one second trench is aligned with the at least one first trench.

8. The method of claim 7 wherein—

the individual semiconductor devices include first sidewalls formed by the at least one first trench,

individual sections of the carrier substrate include second sidewalls formed by the at least one second trench, and

the second sidewalls are positioned laterally outwardly from corresponding first sidewalls.

9. The method of claim 7 wherein—

the individual semiconductor devices include first sidewalls formed by the at least one first trench,

individual sections of the carrier substrate include second sidewalls formed by the at least one second trench, and

the first sidewalls are positioned laterally outwardly from corresponding second sidewalls.

10. A method of forming solid state transducer (SST) devices, the method comprising:

providing a semiconductor device assembly including a support substrate, a stack of semiconductor materials attached to the support substrate, and conductive material attached to the semiconductor structure;

removing portions of material from the stack of semiconductor materials and conductive material to form individual mesas, the individual mesas being attached to one another via the support substrate, wherein the individual mesas include a vertical sidewall extending from an active surface of the stack of semiconductor materials to a contact surface of the conductive material;

after forming the individual mesas, attaching a transfer structure to the contact surface of the conductive material of the individual mesas, wherein the transfer structure extends laterally across the individual mesas;

after attaching the transfer structure, removing the support substrate from the individual mesas using a chemical etchant to expose the active surface of the stack of semiconductor materials of the individual mesas; and

after removing the support substrate, attaching an optically-transmissive material at the active surface of the individual mesas.

11. The method of claim 10 , further comprising singulating the optically transmissive material to form individual SST devices.

12. The method of claim 11 , further comprising:

before attaching the optically-transmissive material, roughening the active surface of the stack of semiconductor materials.

13. The method of claim 10 wherein removing portions of material comprises removing first portions of material to form trenches that extend between and separate the individual mesas from one another, the method further comprising removing second portions of material from the conductive material to form first contacts and second contacts separated from the corresponding first contacts.

14. The method of claim 13 wherein removing first portions comprises (a) disposing a mask over the conductive material to define locations of the trenches, and (b) etching the first portions.

15. The method of claim 10 wherein attaching a transfer structure comprises attaching a die-attach tape.

16. The method of claim 1 wherein removing the support substrate using the chemical etchant includes undercutting the support substrate using the chemical etchant at the at least one trench.

17. The method of claim 10 wherein removing the support substrate using the chemical etchant includes undercutting the support substrate using the chemical etchant at the removed portions from the stack of semiconductor materials.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050709/0838 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0333 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 044348/0253 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 044653/0333 →