IP Library Granted Patent US 10,276,479
Granted Patent B1
US 10,276,479 · App. 15/730,272 · Granted Apr 30, 2019

Methods of processing semiconductor devices

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Quick Facts
Patent No.
US 10,276,479
App. No.
15/730,272
Granted
Apr 30, 2019
Kind
B1
Abstract

Methods of processing a semiconductor device include providing a patterned mask over a major surface of a substrate and comprising at least one opening exposing a conductive structure, and depositing particles of material by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening to form a supplemental mask over the major surface of the substrate. Other methods of processing semiconductor devices include depositing particles of material by direct material deposition adjacent a conductive structure at an intersection of the conductive structure and a surface of a substrate.

Claims (22)

1. A method of processing a semiconductor device, the method comprising:

providing a patterned mask over a major surface of a material, the mask comprising at least one opening exposing a conductive structure; and

depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening to form a supplemental mask over the major surface of the material.

2. The method of claim 1 , wherein depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening comprises forming a surface of the supplemental mask at an included angle with the major surface of the material between about 10° and about 80°.

3. The method of claim 2 , wherein depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening comprises forming a surface of the supplemental mask at an included angle with the major surface of the material between about 30° and about 60°.

4. The method of claim 2 , wherein depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening comprises forming a surface of the supplemental mask at an included angle with the major surface of the material of about 45°.

5. The method of claim 1 , wherein depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening comprises forming a surface of the supplemental mask of arcuate cross-section.

6. The method of claim 1 , wherein depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening comprises depositing a material selected from the group consisting of a polyimide, a polyimide-like material, an epoxy, an epoxy-acrylate, or a wax-based material.

7. The method of claim 1 , wherein depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening comprises forming a mask opening having a side wall tapering downwardly and inwardly from adjacent an exposed upper surface of the mask.

8. The method of claim 1 , wherein depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening comprises expelling particles from at least one nozzle.

9. The method of claim 8 , wherein expelling particles from at least one nozzle comprises expelling particles normal to the major surface.

10. The method of claim 8 , wherein expelling particles from at least one nozzle comprises expelling particles at an oblique angle to the major surface.

11. The method of claim 8 , wherein expelling particles from at least one nozzle comprises expelling particles from a plurality of nozzles simultaneously.

12. The method of claim 8 , wherein expelling particles from at least one nozzle comprises selectively expelling particles from a subset of a plurality of nozzles.

13. The method of claim 1 , wherein depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening comprises depositing particles having a mean diameter from about 100 nm to about 50 μm.

14. The method of claim 13 , wherein depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening comprises depositing particles having a mean diameter from about 500 nm to about 5 μm.

15. The method of claim 14 , wherein depositing particles by direct material deposition adjacent and in contact with an edge wall of the mask adjacent the at least one opening comprises depositing particles having a mean diameter from about 700 nm to about 2 μm.

16. A method, comprising:

forming a dielectric material over and in contact with a surface of another material adjacent and in contact with a side wall of a structure on the another material by direct material deposition, the dielectric material having a surface profile tapered downwardly from the side wall toward the another material.

17. The method of claim 16 , further comprising forming the dielectric material with a profile selected from the group consisting of a linear surface profile, a convex surface profile, and a concave surface profile.

18. The method of claim 16 , wherein forming a dielectric material over and in contact with a surface of another material adjacent and in contact with a side wall of a structure on the another material comprises forming the dielectric material in contact with an edge wall of a solder mask.

19. The method of claim 16 , wherein forming a dielectric material over and in contact with a surface of another material adjacent and in contact with a side wall of a structure on the another material comprises forming the dielectric material in contact with a wall of a conductive structure.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050709/0838 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0333 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 044653/0333 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 044348/0253 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2017
From: WIRZ, BRANDON P.; MURRAY, JACK E.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 043840/0374 →