IP Library Granted Patent US 10,553,755
Granted Patent B2
US 10,553,755 · App. 15/745,940 · Granted Feb 4, 2020

Method for producing a plurality of semiconductor chips having recesses in the device layer

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Quick Facts
Patent No.
US 10,553,755
App. No.
15/745,940
Granted
Feb 4, 2020
Kind
B2
Abstract

The invention relates, inter alia, to a method for producing a plurality of semiconductor chips, the method comprising the following steps: providing a substrate ( 1 ); applying a semiconductor layer sequence ( 2 ) to the substrate ( 1 ); generating a plurality of recesses ( 6 ) in the semiconductor layer sequence ( 2 ) on the side of the semiconductor layer sequence ( 2 ) that is facing away from the substrate ( 1 ); detaching the substrate ( 1 ) from the semiconductor layer sequence ( 2 ); thinning the semiconductor layer sequence ( 2 ) on the side that was facing the substrate ( 1 ) prior to detaching the substrate ( 1 ).

Claims (42)

1. Method for producing a plurality of semiconductor chips comprising the following steps:

providing a substrate,

applying a semiconductor layer sequence on the substrate,

generating a plurality of recesses in the semiconductor layer sequence from the side of the semiconductor layer sequence facing away from the substrate,

removing the substrate from the semiconductor layer sequence,

thinning the semiconductor layer sequence from the side facing the substrate before removal of the substrate,

wherein the recesses do not completely penetrate the semiconductor layer sequence before thinning of the semiconductor layer sequence respectively, and the recesses penetrate the semiconductor layer sequence completely after thinning of the semiconductor layer sequence, respectively, and

wherein the semiconductor layer sequence is a radiation-emitting semiconductor layer sequence or a nitride semiconductor layer sequence.

2. Method according to claim 1 ,

wherein before thinning of the semiconductor layer sequence a residue of the material of the semiconductor layer sequence remains between the lowermost point of the recesses and the substrate, so that the semiconductor layer sequence has a minimum thickness (D).

3. Method according to claim 1 ,

wherein the recesses are tapering towards the substrate before removal of the substrate.

4. Method according to claim 1 ,

wherein the recesses are generated along a chip grid.

5. Method according to claim 1 , wherein the thinning of the semiconductor layer sequence is performed by roughening the semiconductor layer sequence, by means of which roughenings are generated on the side of the semiconductor layer sequence originally facing the substrate.

6. Method according to claim 1 ,

wherein after generating the plurality of the recesses an isolation layer sequence is generated, the isolation layer sequence covering the semiconductor layer sequence on surfaces facing the recesses.

7. Method according to claim 6 ,

wherein during thinning of the semiconductor layer sequence the isolation layer sequence is exposed in some places.

8. Method according to claim 1 ,

wherein a carrier is generated on the side of the semiconductor layer sequence facing away from the substrate before removing the substrate, wherein the carrier includes a plurality of first contactings, a plurality of second contactings, and the shaped body, wherein the shaped body surrounds the contactings laterally.

9. Method according to claim 8 ,

wherein the shaped body extends in the plurality of recesses and fills them at least in some places.

10. Method according to claim 8 ,

wherein a singulation is performed in a plurality of semiconductor chips along separation lines, wherein at least some of the separation lines extend through a recess and the shaped body,

wherein each singulated semiconductor chip is assigned at least one first contacting and at least one second contacting.

11. Method for producing a plurality of semiconductor chips comprising the following steps:

providing a substrate,

applying a semiconductor layer sequence on the substrate,

generating a plurality of recesses in the semiconductor layer sequence from the side of the semiconductor layer sequence facing away from the substrate,

removing the substrate from the semiconductor layer sequence,

thinning the semiconductor layer sequence from the side facing the substrate before removal of the substrate,

wherein before thinning of the semiconductor layer sequence a residue of the material of the semiconductor layer sequence remains between the lowermost point of the recesses and the substrate, so that the semiconductor layer sequence has a minimum thickness (D), and

wherein the semiconductor layer sequence is a radiation-emitting semiconductor layer sequence or a nitride semiconductor layer sequence.

12. Method for producing a plurality of semiconductor chips comprising the following steps:

providing a substrate,

applying a semiconductor layer sequence on the substrate,

generating a plurality of recesses in the semiconductor layer sequence from the side of the semiconductor layer sequence facing away from the substrate,

removing the substrate from the semiconductor layer sequence,

thinning the semiconductor layer sequence from the side facing the substrate before removal of the substrate,

wherein a carrier is generated on the side of the semiconductor layer sequence facing away from the substrate before removing the substrate, wherein the carrier includes a plurality of first contactings, a plurality of second contactings, and the shaped body, wherein the shaped body surrounds the contactings laterally, and

wherein the semiconductor layer sequence is a radiation-emitting semiconductor layer sequence or a nitride semiconductor layer sequence.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: OSRAM OPTO SEMICONDUCTORS GMBH
To: OSRAM OLED GMBH
Reel/Frame 051464/0504 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2018
From: HOEPPEL, LUTZ; MOLNAR, ATTILA
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 045294/0700 →