Advanced processing apparatus comprising a plurality of quantum processing elements
The present disclosure provides a scalable architecture for an advanced processing apparatus for performing quantum processing. The architecture is based on an all-silicon CMOS fabrication technology. Transistor-based control circuits, together with floating gates, are used to operate a two-dimensional array of qubits. The qubits are defined by the spin states of a single electron confined in a quantum dot.
1. An advanced processing apparatus, comprising:
a plurality of quantum processing elements arranged in a 2D matrix; each processing element comprising silicon and a dielectric material forming an interface and an electrode arrangement suitable to confine one or more electrons or holes in the silicon, for each quantum processing element, to form a quantum dot operable as a qubit;
a plurality of interconnected control members forming a matrix of control members; each control member comprising a silicon metal-oxide-semiconductor transistor disposed above a respective quantum processing element and configured to interact with the electrode arrangement to perform quantum operations with the processing element; and
a plurality of control lines; each control line being connected to a plurality of control members via the metal-oxide-semiconductor transistors to enable simultaneous operation of a plurality of processing elements.
2. The apparatus of claim 1 wherein the quantum operations comprise any one of initialisation, quantum control and readout of the processing element.
3. The apparatus of claim 1 wherein the electrode arrangement comprises one or more electrodes which are controllable to form the quantum dot and operate the quantum dot as a qubit.
4. The apparatus of claim 1 wherein the processing elements are arranged in the 2D matrix at the interface which is formed between a silicon layer and a dielectric layer; the interface, the silicon layer and the dielectric layer being shared by the processing elements.
5. The apparatus of claim 4 wherein the electrode arrangement is disposed onto the dielectric layer and the quantum dot is formed within the silicon layer and in proximity of the interface.
6. The apparatus of claim 4 wherein each control line is arranged along a row or a column of the 2D matrix of processing elements and is capable of interacting with all the processing elements disposed along the row or column.
7. The apparatus of claim 1 wherein each processing element is associated with at least two control members.
8. The apparatus of claim 7 wherein a first control member is arranged to provide a biasing voltage to form the quantum dot and a second control member is arranged to operate the quantum dot as a qubit.
9. The apparatus of claim 8 wherein a first set of control lines is arranged in a manner such that the biasing voltage is applicable to the first control member of selected processing elements to form the quantum dots.
10. The apparatus of claim 1 wherein the electrode arrangement is operable to form the quantum dot and tune the quantum dot so that the energy at which the state of the qubit is affected can be adjusted over a range of energy values.
11. The apparatus of claim 1 wherein the electrode arrangement is operable to control a quantum property of the quantum dot to operate the quantum dot as a qubit.
12. The apparatus of claim 10 wherein the electrode arrangement is operable to tune the electron or hole spin resonance frequency of the quantum dot.
13. An advanced processing apparatus comprising a plurality of multi-qubit modules; each multi-qubit module comprising an apparatus in accordance with claim 1 .
14. The apparatus of claim 13 wherein the plurality of multi-qubit modules are interconnected by superconducting resonators or spin-buses.