Memory, memory controller, storage apparatus, information processing system, and control method for tracking erase count and rewrite cycles of memory pages
To enhance accuracy of counting the number of rewrite cycles in a non-volatile memory that is overwritable. A memory outputs erase information that is information regarding whether or not erase processing has been performed in writing of data in units of pages each including a plurality of memory cells in which data is rewritten by program processing of shifting a memory cell that stores data from an initial state to a data-storing state and erase processing of shifting the memory cell from the data-storing state to the initial state. The number of rewrite cycles is counted by updating the number of rewrite cycles on a basis of the output erase information.
1. A memory, comprising:
a control unit configured to write data in a unit of pages based on at least one of a program process or an erase process, wherein
each page of the pages includes a plurality of memory cells,
the program process indicates a shift of a state of a memory cell of the plurality of memory cells from an initial state to a data-storing state, and
the erase process indicates a shift of the state of the memory cell from the data-storing state to the initial state; and
a status generation unit configured to generate and output erase information that indicate whether the erase process is performed in the writing of the data.
2. The memory according to claim 1 , wherein the status generation unit is further configured to generate and output program information that indicate whether the program process is performed in the writing of the data.
3. The memory according to claim 1 , wherein
each page of the pages comprising a plurality of regions,
each region of the plurality of regions has a specific size, and
the status generation unit is further configured to generate and output the erase information for the plurality of regions of each page.
4. A memory controller, comprising:
a counting-of-number-of-rewrite-cycles determination unit configured to:
receive erase information from a memory, wherein
the erase information indicate whether an erase process is performed in writing of data,
the data is written in a unit of pages based on at least one of a program process or the erase process,
each page of the pages includes a plurality of memory cells,
the program process indicates a shift of a state of a memory cell of the plurality of memory cells from an initial state to a data-storing state, and
the erase process indicates a shift of the state of the memory cell from the data-storing state to the initial state; and
determine whether to count the erase process as a number of rewrite cycles for each page based on the received erase information; and
a number-of-rewrite-cycles management unit configured to update and retain the number of rewrite cycles for each page based on a result of the determination.
5. The memory controller according to claim 4 , wherein
the counting-of-number-of-rewrite-cycles determination unit is further configured to receive program information from the memory, wherein
the program information indicate whether the program process is performed in the writing of the data,
the memory controller further comprising a program information retention unit configure to retain the received program information for each of the pages,
the counting-of-number-of-rewrite-cycles determination unit is further configured to determine that the erase process is counted as the number of rewrite cycles, based on the erase information when the writing is continuously performed on a same page of the pages indicates execution of the program process.
6. The memory controller according to claim 4 , wherein
each page of the pages comprising a plurality of regions,
each region of the plurality of regions has a specific size,
the counting-of-number-of-rewrite-cycles determination unit is further configured to:
receive the erase information for the plurality of regions of each page, and
determine whether to count the erase process as the number of rewrite cycles for each region of each page based on the received erase information of the plurality of regions of each page,
the number-of-rewrite-cycles management unit is further configured to update and retain the number of rewrite cycles for each region of each page,
the memory controller further comprising a number-of-rewrite-cycles output unit configured to output a maximum number of rewrite cycles among the numbers of retained rewrite cycles of the respective regions of each page, as the number of rewrite cycles in the page.
7. The memory controller according to claim 4 , further comprising a data-swapping control unit configured to control data swapping between a first page of the pages to a second page of the pages, wherein
the first page has a first number of rewrite cycles;
the second page has a second number of rewrite cycles,
the first number is larger than the second number, and
the first number of rewrite cycles and the second number of rewrite cycles are included in the number of rewrite cycles retained in the number-of-rewrite-cycles management unit.
8. A storage apparatus, comprising:
a memory that comprises:
a control unit configured to write data in a unit of pages based on at least one of a program process or an erase process, wherein
each page of the pages includes a plurality of memory cells,
the program process indicates a shift of a state of a memory cell of the plurality of memory cells from an initial state to a data-storing state, and
the erase process indicates a shift of the state of the memory cell from the data-storing state to the initial state; and
a status generation unit configured to generate and output erase information that indicate whether the erase process is performed in the writing of the data;
a counting-of-number-of-rewrite-cycles determination unit configured to:
receive the erase information from the memory; and
determine whether to count the erase process as a number of rewrite cycles for each page based on the received erase information; and
a number-of-rewrite-cycles management unit configured to update and retain the number of rewrite cycles for each page based on a result of the determination.
9. The storage apparatus according to claim 8 , wherein
the counting-of-number-of-rewrite-cycles determination unit is further configured to receive program information from the memory, wherein
the program information indicate whether the program process is performed in the writing of the data,
the storage apparatus further comprising a program information retention unit configured to retain the received program information for each of the pages,
the counting-of-number-of-rewrite-cycles determination unit is further configured to determine that the erase process is counted as the number of rewrite cycles, based on the erase information when the writing is continuously performed on a same page of the pages indicates execution of the program process.
10. An information processing system, comprising:
a storage apparatus that includes:
a memory that comprises:
a control unit configured to write data in a unit of pages based on at least one of a program process or an erase process, wherein
each page of the pages includes a plurality of memory cells,
the program process indicates a shift of a state of a memory cell of the plurality of memory cells from an initial state to a data-storing state, and
the erase process indicates a shift of the state of the memory cell from the data-storing state to the initial state; and
a status generation unit configured to generate and output erase information that indicate whether the erase process is performed in the writing of the data;
a counting-of-number-of-rewrite-cycles determination unit configured to:
receive the erase information from the memory; and
determine whether to count the erase process as a number of rewrite cycles for each page based on the received erase information; and
a number-of-rewrite-cycles management unit configured to update and retain the number of rewrite cycles for each page based on a result of the determination; and
a host computer configured to access the storage apparatus.
11. A control method for a memory, comprising:
writing data in a unit of pages based on at least one of a program process or an erase process, wherein
each page of the pages includes a plurality of memory cells,
the program process indicates a shift of a state of a memory cell of the plurality of memory cells from an initial state to a data-storing state, and
the erase process indicates a shift of the state of the memory cell from the data-storing state to the initial state; and
generating and outputting erase information that indicate whether the erase process is performed in the writing of the data.