Message authentication
According to an example aspect of the present invention, there is provided an apparatus comprising at least one processing core, at least one memory including computer program code, the at least one memory and the computer program code being configured to, with the at least one processing core, cause the apparatus at least to compile, from information comprised in a message received in the apparatus, a protection bit sequence, the protection bit sequence comprising a first part and a second part, identify a sender of the message based on identifying a secret key that decrypts the first part into a plaintext bit sequence comprised in the message, and verify the protection bit sequence has been advanced with respect to a protection bit sequence in a previous message from the same sender.
1. An apparatus comprising at least one processing core, at least one memory including computer program code, the at least one memory and the computer program code being configured to, with the at least one processing core, cause the apparatus at least to:
compile, from information comprised in a message received in the apparatus, a protection bit sequence, the protection bit sequence comprising a first part and a second part, the first part comprising a segment of most significant bits of the protection bit sequence and the second part comprising a segment of least significant bits of the protection bit sequence;
identify a sender of the message based on identifying a secret key that decrypts the first part into a plaintext bit sequence comprised in the message;
verify that a number represented by both parts together of the protection bit sequence has been incremented or decremented with respect to a protection bit sequence in a previous message from the same sender, and
determine a subsequent first part that will be associated with a set of future messages from the sender, when advancing the protection bit sequence will cause the first part to change.
2. The apparatus according to claim 1 , wherein the plaintext bit sequence is distinct from the first part and the second part.
3. The apparatus according to claim 1 , wherein the protection bit sequence comprises a counter or a timestamp.
4. The apparatus according to claim 1 , wherein the first part is comprised in an address field of the message.
5. The apparatus according to claim 4 , wherein the address field is a sender address field.
6. The apparatus according to claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processing core, cause the apparatus to determine the subsequent first part responsive to a determination that the apparatus has spare computation capacity.
7. The apparatus according to claim 1 , wherein the at least one memory and the computer program code are configured to, with the at least one processing core, cause the apparatus to determine a set of subsequent first parts, each subsequent first part in the set corresponding to a distinct sender, responsive to the determination that the apparatus has spare computation capacity.
8. A computer implemented method using at least one or more hardware processors, the method comprising:
compiling, from information comprised in a message received via a computer network in an apparatus, a protection bit sequence, the protection bit sequence comprising a first part and a second part, the first part comprising a segment of most significant bits of the protection bit sequence and the second part comprising a segment of least significant bits of the protection bit sequence;
identifying, using the at least one or more hardware processors, a sender of the message based on identifying a secret key that decrypts the first part into a plaintext bit sequence comprised in the message;
verifying, using the at least one or more hardware processors, that a number represented by both parts together of the protection bit sequence has been incremented or decremented with respect to a protection bit sequence in a previous message from the same sender, and
determining a subsequent first part that will be associated with a set of future messages from the sender, when advancing the protection bit sequence will cause the first part to change.
9. The method according to claim 8 , wherein the plaintext bit sequence is distinct from the first part and the second part.
10. The method according to claim 8 , wherein the protection bit sequence comprises a counter or a timestamp.
11. The method according to claim 8 , wherein the first part is comprised in an address field of the message.
12. A non-transitory computer readable medium having stored thereon a set of computer readable instructions that, when executed by at least one processor, cause an apparatus to at least:
compile, from information comprised in a message received in the apparatus, a protection bit sequence, the protection bit sequence comprising a first part and a second part, the first part comprising a segment of most significant bits of the protection bit sequence and the second part comprising a segment of least significant bits of the protection bit sequence;
identify a sender of the message based on identifying a secret key that decrypts the first part into a plaintext bit sequence comprised in the message;
verify that a number represented by both parts together of the protection bit sequence has been incremented or decremented with respect to a protection bit sequence in a previous message from the same sender, and
determine a subsequent first part that will be associated with a set of future messages from the sender, when advancing the protection bit sequence will cause the first part to change.