IP Library Granted Patent US 10,224,425
Granted Patent B2
US 10,224,425 · App. 15/767,310 · Granted Mar 5, 2019

Electric power converter

Inventors: Yujiro Takeuchi (Tokyo, JP); Mutsuhiro Mori (Tokyo, JP)
Assignee: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
H01L29/7397H01L29/1095H01L29/1608H01L29/739H01L29/78H01L29/872H02M1/08H02M7/48H02M7/5387H02M7/53875H03K17/08128H03K17/08148H03K17/163H03K17/168H02M2001/0048H02P27/06Y02B70/1483Y02B70/1491
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Quick Facts
Patent No.
US 10,224,425
App. No.
15/767,310
Granted
Mar 5, 2019
Kind
B2
Abstract

An electric power converter ( 100 ) which is provided with a switching element ( 101 ) and a rectifying element ( 102 ) that is connected in series to the switching element ( 101 ). This electric power converter ( 100 ) has a configuration wherein an external electrical load ( 103 ) is connected to the connection point of the switching element ( 101 ) and the rectifying element ( 102 ). The switching element ( 101 ) is composed of an insulating gate type semiconductor element that has a first gate terminal ( 105 ) and a second gate terminal ( 106 ). The rectifying element ( 102 ) is composed of a diode that has a Schottky junction which uses silicon carbide as a semiconductor base. Different driving signals are applied to the first gate terminal ( 105 ) and the second gate terminal ( 106 ), respectively.

Claims (57)

1. A power conversion device comprising:

a switching element; and

a rectifier element connected in series with the switching element, wherein

the power conversion device is constructed to connect with an external electric load at a connection point of the switching element and the rectifier element,

the switching element comprises an insulated gate semiconductor element having a first gate terminal and a second gate terminal,

the rectifier element comprises a diode having a Schottky junction using silicon carbide as a semiconductor substrate, and

the switching element is configured to apply different drive signals to the first gate terminal and the second gate terminal, respectively, and

wherein the insulated gate semiconductor element comprises

a first-conductive-type first semiconductor layer;

a second-conductive-type second semiconductor layer provided on a first surface of the first semiconductor layer;

a plurality of trenches penetrating the second semiconductor layer from a surface of the second semiconductor layer not contacting the first semiconductor layer and reaching the first semiconductor layer;

a plurality of gate electrodes configured to include a conductor provided in each of the plurality of trenches and an insulating film provided around the conductor;

a first-conductive-type third semiconductor layer provided on a surface of the second semiconductor layer not contacting the first semiconductor layer to be adjacent to the gate electrodes;

a second-conductive-type fourth semiconductor layer provided on a second surface of the first semiconductor layer;

an emitter electrode provided on a surface of the second semiconductor layer not contacting the first semiconductor layer and a surface of the third semiconductor layer; and

a collector electrode provided on a surface of the fourth semiconductor layer not contacting the first semiconductor layer,

wherein the plurality of gate electrodes comprises

a first gate electrode connected to the first gate terminal; and

a second gate electrode connected to the second gate terminal.

2. The power conversion device according to claim 1 ,

wherein the third semiconductor layer comprises

a first layer of the third semiconductor layer adjacent to the first gate electrode; and

a second layer of the third semiconductor layer adjacent to the second gate electrode,

wherein a direction orthogonal to a depth direction of the trench and a width direction of the trench is set as a depth direction,

wherein the third semiconductor layer is repeatedly provided in the depth direction, and

wherein a ratio a 1 /b 1 of a length a 1 of the depth direction of the first layer of the third semiconductor layer and a length b 1 of a repetition unit of the depth direction of the second semiconductor layer including the first layer of the third semiconductor layer is different from a ratio a 2 /b 2 of a length a 2 of the depth direction of the second layer of the third semiconductor layer and a length b 2 of a repetition unit of the depth direction of the second semiconductor layer including the second layer of the third semiconductor layer.

3. The power conversion device according to claim 2 , wherein the ratio a 1 /b 1 is smaller than the ratio a 2 /b 2 .

4. The power conversion device according to claim 1 , wherein

each first gate electrode is adjacent to one first gate electrode and one second gate electrode, and

each second gate electrode is adjacent to one second gate electrode and one first gate electrode.

5. The power conversion device according to claim 1 ,

wherein the plurality of trenches comprise sets of two trenches adjacent to each other with the third semiconductor layer therebetween,

wherein an interval of two trenches belonging to a same set is smaller than an interval of two trenches adjacent to each other, but not belonging to the same set, and

wherein in each of the plurality of gate electrodes, one first gate electrode and one second gate electrode are provided in different trenches, respectively, in one of the sets of the trenches.

6. The power conversion device according to claim 5 , wherein the third semiconductor layer comprises:

a first layer of the third semiconductor layer adjacent to the first gate electrode, and

a second layer of the third semiconductor layer adjacent to the second gate electrode,

wherein a direction orthogonal to a depth direction of the trench and a width direction of the trench is set as a depth direction,

wherein the third semiconductor layer is repeatedly provided in the depth direction, and

wherein a ratio a 1 /b 1 of a length a 1 of the depth direction of the first layer of the third semiconductor layer and a length b 1 of a repetition unit of the depth direction of the second semiconductor layer including the first layer of the third semiconductor layer is different from a ratio a 2 /b 2 of a length a 2 of the depth direction of the second layer of the third semiconductor layer and a length b 2 of a repetition unit of the depth direction of the second semiconductor layer including the second layer of the third semiconductor layer.

7. The power conversion device according to claim 6 , wherein the ratio a 1 /b 1 is smaller than the ratio a 2 /b 2 .

8. The power conversion device according to claim 5 , wherein

each first gate electrode is adjacent to one first gate electrode and one second gate electrode, and

each second gate electrode is adjacent to one second gate electrode and one first gate electrode.

9. The power conversion device according to claim 1 , wherein

a width of each of the plurality of trenches is larger than an interval of the trench and a trench adjacent to the trench, and

in one of the plurality of trenches, one first gate electrode and one second gate electrode contact different sidewalls of one trench, respectively.

10. The power conversion device according to claim 9 , wherein the third semiconductor layer comprises:

a first layer of the third semiconductor layer adjacent to the first gate electrode; and

a second layer of the third semiconductor layer adjacent to the second gate electrode,

wherein a direction orthogonal to a depth direction of the trench and a width direction of the trench is set as a depth direction,

wherein the third semiconductor layer is repeatedly provided in the depth direction, and

wherein a ratio a 1 /b 1 of a length a 1 of the depth direction of the first layer of the third semiconductor layer and a length b 1 of a repetition unit of the depth direction of the second semiconductor layer including the first layer of the third semiconductor layer is different from a ratio a 2 /b 2 of a length a 2 of the depth direction of the second layer of the third semiconductor layer and a length b 2 of a repetition unit of the depth direction of the second semiconductor layer including the second layer of the third semiconductor layer.

11. The power conversion device according to claim 10 , wherein the ratio a 1 /b 1 is smaller than the ratio a 2 /b 2 .

12. The power conversion device according to claim 9 , wherein

each first gate electrode is adjacent to one first gate electrode and one second gate electrode, and

each second gate electrode is adjacent to one second gate electrode and one first gate electrode.

Assignments (2)
CHANGE OF NAME Recorded Apr 30, 2025
From: HITACHI POWER SEMICONDUCTOR DEVICE LTD.
To: MINEBEA POWER SEMICONDUCTOR DEVICE INC.
Reel/Frame 071142/0232 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2018
From: TAKEUCHI, YUJIRO; MORI, MUTSUHIRO
To: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
Reel/Frame 045996/0198 →
Priority Claims (1)
JP 2015-206056 · Oct 20, 2015 · national
Continuity (1)
Related Publication 20180301549A1 · Oct 18, 2018