MEMS multi-module assembly, manufacturing method and electronics apparatus

1. A MEMS (Micro Electromechanical System) multi-module assembly, comprising:

a first die having a first MEMS device and a first hole;

a second die stacked on the first die with a first space formed therebetween, the second die having a second MEMS device with a second hole, and

a third die stacked on the second die having a third MEMS device, a second space being formed between the second die and the third die,

wherein the first MEMS device is in communication with an area outside the assembly via the first hole and the first space, the second MEMS device is in communication with the area outside the assembly via the first hole, the first space, and the second hole, and the third MEMS device is in communication with the area outside the assembly via the first hole, the first space, the second hole, and the second space.

2. The MEMS multi-module assembly according to claim 1 , wherein the first die has a pad on the side opposite to the second die.

3. The MEMS multi-module assembly according to claim 1 , wherein the third die has a pad on the side opposite to the second die.

4. The MEMS multi-module assembly according to claim 1 , wherein the first die and the second die are bonded through at least one of metal-metal thermal-compression bond, metal/alloy eutectic bond, or electric-conductive adhesive bond.

5. The MEMS multi-module assembly according to claim 1 , wherein the second die and the third die are bonded through at least one of metal-metal thermal-compression bond, metal/alloy eutectic bond, or electric-conductive adhesive bond.

6. The MEMS multi-module assembly according to claim 1 , wherein the first die and the second die are vertically electrically interconnected by through silicon via.

7. The MEMS multi-module assembly according to claim 1 , wherein the second die and the third die are vertically electrically interconnected by through silicon via.

8. A method for manufacturing a MEMS (Micro Electromechanical System) multi-module assembly, comprising:

forming a first wafer, wherein the first wafer has at least one first MEMS device and has at least one first hole;

forming a second wafer, wherein the second wafer has at least one second MEMS device with at least one second hole;

stacking the second wafer onto the first wafer with a first space formed therebetween; and

forming a third wafer, wherein the third wafer has at least one third MEMS device;

stacking the third wafer onto the second wafer with a second space formed therebetween; and

singulating the wafers at a wafer level, to form a MEMS multi-module assembly, wherein each wafer is singulated into at least one die,

wherein the first MEMS device is in communication with an area outside the assembly via the first hole and the first space, the second MEMS device is in communication with the area outside the assembly via the first hole, the first space, and the second hole, and the third MEMS device is in communication with the area outside the assembly via the first hole, the first space, the second hole, and the second space.

9. The method according to claim 8 , further comprising: forming a pad on the first wafer at the side opposite to the second wafer.

10. The method according to claim 8 , further comprising: forming a pad on the third wafer at the side opposite to the second wafer.

11. The method according to claim 8 , further comprising: bonding the first wafer and the second wafer through at least one of metal-metal thermal-compression bond, metal/alloy eutectic bond, or electric-conductive adhesive bond.

12. The method according to claim 8 , further comprising: bonding the second wafer and the third wafer through at least one of metal-metal thermal-compression bond, metal/alloy eutectic bond, or electric-conductive adhesive bond.

13. The method according to claim 8 , further comprising: vertically electrically interconnecting the first wafer and the second wafer by through silicon via.

14. The method according to claim 8 , further comprising: vertically electrically interconnecting the second wafer and the third wafer by through silicon via.