IP Library Granted Patent US 10,622,508
Granted Patent B2
US 10,622,508 · App. 15/775,817 · Granted Apr 14, 2020

Method for manufacturing an optoelectronic component, and optoelectronic component

Inventors: Dominik Scholz (Bad Abbach, DE); Alexander F. Pfeuffer (Regensburg, DE); Isabel Otto (Regensburg, DE)
Assignee: OSRAM OLED GmbH
H01L33/0079H01L33/382H01L33/385H01L33/405H01L33/44H01L33/32H01L2933/0016H01L2933/0025
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Quick Facts
Patent No.
US 10,622,508
App. No.
15/775,817
Granted
Apr 14, 2020
Kind
B2
Abstract

A method for manufacturing an optoelectronic component includes providing a growth substrate; applying a succession of semiconductor layers; structuring the succession of semiconductor layers; applying a sacrificial layer; depositing a metal layer; optionally planarizing using a dielectric material; forming a second terminal contact through the active region; applying a permanent support; and detaching the growth substrate and exposing the metal layer.

Claims (39)

1. A method for producing an optoelectronic component, the method comprising:

providing a growth substrate;

applying a semiconductor layer sequence, the semiconductor layer sequence having an upper side and a lower side, the semiconductor layer sequence also having an n-doped semiconductor region, a p-doped semiconductor region and an active layer for generating radiation arranged between the n-doped and p-doped semiconductor regions, wherein the upper side faces away from the growth substrate and the lower side faces the growth substrate;

structuring the semiconductor layer sequence from the upper side of the semiconductor layer sequence thereby producing side surfaces of the semiconductor layer sequence;

applying a sacrificial layer on the side surfaces of the semiconductor layer sequence and on surfaces exposed during the structuring of the semiconductor layer sequence;

depositing a metal layer for forming a first connection contact onto the upper side of the semiconductor layer sequence, onto the side surfaces of the semiconductor layer sequence and onto the sacrificial layer;

forming a second connection contact through the active layer;

applying a permanent carrier to the upper side of the semiconductor layer sequence;

detaching the growth substrate, wherein no lithography steps are performed after the growth substrate is detached; and

exposing the metal layer.

2. The method according to claim 1 , wherein the sacrificial layer is applied on the side surfaces of the semiconductor layer sequence and on surfaces exposed during the structuring of the semiconductor layer sequence in order to remove the growth substrate by laser lifting methods.

3. The method according to claim 1 , wherein the metal layer comprises a p-connection contact, a mirror coating on the side faces of the semiconductor layer sequence and a bonding pad.

4. The method according to claim 1 , wherein a lateral extent of the semiconductor layer sequence and that of the permanent carrier of a finished component are the same.

5. The method according to claim 1 , wherein the metal layer is a p-connection contact having a thickness of at least 10 nm that covers the upper side of the semiconductor layer sequence;

wherein a radiation emission region of the active layer extends over the lower side of the semiconductor layer sequence;

wherein the metal layer is arranged laterally to and in a plane with the n-doped semiconductor region; and

wherein the plane is oriented perpendicular to a growth direction of the semiconductor layer sequence.

6. The method according to claim 1 , wherein the second connection contact is an n-connection contact, wherein the n-connection contact is arranged laterally to and in a plane with the n-doped semiconductor region.

7. The method according to claim 1 , wherein the second connection contact formed is an n-connection contact, wherein the n-connection contact and the metal layer comprise aluminum.

8. The method according to claim 1 , wherein detaching the growth substrate results in exposing the metal layer.

9. The method according to claim 1 , wherein exposing the metal layer is effected by wet-chemical removal of the sacrificial layer.

10. The method according to claim 1 , further comprising, after applying the sacrificial layer but before depositing the metal layer, depositing a gold layer onto a region of the sacrificial layer arranged on the surface of the growth substrate.

11. The method according to claim 1 , wherein the second connection contact is an n-connection contact and comprises silver.

12. The method according to claim 1 , wherein the metal layer comprises gold.

13. The method according to claim 1 , further comprising, after depositing the metal layer, performing a planarization by filling up regions located laterally to the semiconductor layer sequence with a dielectric material, the regions being filled to at least the upper side of the semiconductor layer sequence.

14. The method according to claim 13 , wherein the sacrificial layer comprises silicon nitride and the dielectric material is silicon oxide.

15. The method according to claim 1 , wherein structuring the semiconductor layer sequence comprises structuring from the upper side of the semiconductor layer sequence to the lower side of the semiconductor layer sequence thereby producing the side surfaces of the semiconductor layer sequence.

16. The method according to claim 15 , wherein detaching the growth substrate results in exposing the metal layer.

17. An optoelectronic component, produced by the method according to claim 1 .

18. A method for producing an optoelectronic component, the method comprising:

providing a growth substrate;

applying a semiconductor layer sequence, the semiconductor layer sequence having an upper side and a lower side, the semiconductor layer sequence also having an n-doped semiconductor region, a p-doped semiconductor region and an active layer for generating radiation arranged between the n-doped and p-doped semiconductor regions, wherein the upper side faces away from the growth substrate and the lower side faces the growth substrate;

structuring the semiconductor layer sequence from the upper side of the semiconductor layer sequence thereby producing side surfaces of the semiconductor layer sequence;

applying a sacrificial layer on the side surfaces of the semiconductor layer sequence and on surfaces exposed during the structuring of the semiconductor layer sequence;

depositing a metal layer for forming a first connection contact onto the upper side of the semiconductor layer sequence, onto the side surfaces of the semiconductor layer sequence and onto the sacrificial layer;

forming a second connection contact through the active layer;

applying a permanent carrier to the upper side of the semiconductor layer sequence;

detaching the growth substrate; and

exposing the metal layer, wherein detaching the growth substrate results in exposing the metal layer.

Assignments (3)
MERGER Recorded Feb 17, 2026
From: OSRAM OLED GMBH
To: AMS-OSRAM INTERNATIONAL GMBH
Reel/Frame 074881/0104 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: OSRAM OPTO SEMICONDUCTORS GMBH
To: OSRAM OLED GMBH
Reel/Frame 051464/0504 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2018
From: SCHOLZ, DOMINIK; PFEUFFER, ALEXANDER F.; OTTO, ISABEL
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 046219/0218 →