IP Library Granted Patent US 10,405,382
Granted Patent B2
US 10,405,382 · App. 15/782,054 · Granted Sep 3, 2019

System and method for shaping input current in light emitting diode (LED) system

Inventor: Hyunchul Eum (Gwangmyeong, KR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H05B33/0815H05B33/0812H05B33/0854
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Quick Facts
Patent No.
US 10,405,382
App. No.
15/782,054
Granted
Sep 3, 2019
Kind
B2
Abstract

A method for controlling a lighting system includes detecting a phase angle of a rectified input signal, determining a current shaping signal using the detected phase angle, and adjusting the rectified input signal in response to the current shaping signal. A circuit for controlling a lighting system includes a phase angle detector detecting a phase angle of a rectified input signal and generating a phase angle signal indicative of the phase angle, and a current shape controller determining a current shaping signal using the detected phase angle and a scaled input signal and adjusting the rectified input signal in response to the current shaping signal.

Claims (58)

1. A method for controlling a light emitting diode (LED) system, the method comprising:

detecting a phase angle of a rectified input signal, the phase angle being a difference between a half period of the rectified input signal and a phase-cut of the rectified input signal;

determining a current shaping signal using the detected phase angle; and

adjusting the rectified input signal in response to the current shaping signal,

wherein adjusting the rectified input signal includes increasing a magnitude of a current of the rectified input signal in a time interval corresponding to the phase angle when the phase angle is decreased.

2. The method of claim 1 , further comprising determining a scaled input signal in response to a voltage of the rectified input signal, and

wherein the magnitude of the current of the rectified input signal is substantially equal to that of a string current flowing through one or more LED strings.

3. The method of claim 2 , wherein the scaled input signal is determined by dividing the voltage of the rectified input signal, the method further comprising:

generating a phase angle signal indicative of the phase angle of the voltage of the rectified input signal; and

subtracting a value of the phase angle signal from a value of a maximum phase angle signal to generate a shaping offset signal.

4. The method of claim 3 , further comprising determining the current shaping signal by adding a value of the scaled input signal to a value of the shaping offset signal.

5. The method of claim 3 , further comprising determining the current shaping signal by multiplying a value of the scaled input signal by a value of the shaping offset signal.

6. The method of claim 3 , further comprising:

determining the current shaping signal in response to the scaled input signal and the shaping offset signal; and

limiting the magnitude of the current of the rectified input signal to a threshold value.

7. The method of claim 6 , wherein the threshold value is determined based on the value of the phase angle signal, the method further comprising:

decreasing the threshold value when the phase angle is decreased.

8. The method of claim 7 , wherein limiting the magnitude of the current of the rectified input signal comprises:

comparing a value of the current shaping signal and the value of the phase angle signal;

selecting one of the current shaping signal and the phase angle signal that has a smaller value to generate a selected signal; and

amplifying a difference between a value of the selected signal and a value of a sense signal, the sense signal indicating the magnitude of the current of the rectified input signal.

9. The method of claim 7 , wherein limiting the magnitude of the current of the rectified input signal comprises:

amplifying a difference between a value of the current shaping signal and a value of the phase angle signal; and

amplifying a difference between a value of a sense signal and the value of the current shaping signal, the sense signal indicating the magnitude of the current of the rectified input signal.

10. A circuit for controlling a light emitting diode (LED) system, the circuit comprising:

a phase angle detector configured to detect a phase angle of a rectified input signal and generate a phase angle signal indicative of the phase angle, the phase angle being a difference between a half period of the rectified input signal and a phase-cut of the rectified input signal; and

a current shape controller configured to determine a current shaping signal using the detected phase angle and to adjust the rectified input signal in response to the current shaping signal,

wherein the current shape controller increases a magnitude of a current of the rectified input signal in a time interval corresponding to the phase angle when the phase angle is decreased.

11. The circuit of claim 10 , further comprising an input signal detector configured to determine a scaled input signal in response to a voltage of the rectified input signal, and

wherein the magnitude of the current of the rectified input signal is substantially equal to that of a string current flowing through one or more LED strings.

12. The circuit of claim 11 , wherein the input signal detector determines the scaled input signal by dividing the voltage of the rectified input signal,

wherein the current shape controller includes a shaping signal generator determining the current shaping signal in response to the scaled input signal and the phase angle signal, and

wherein the shaping signal generator includes a subtractor subtracting a value of the phase angle signal from a value of a maximum phase angle signal to generate a shaping offset signal.

13. The circuit of claim 12 , wherein the shaping signal generator further includes an adder determining the current shaping signal by adding a value of the scaled input signal to a value of the shaping offset signal.

14. The circuit of claim 12 , wherein the shaping signal generator further includes a multiplier determining the current shaping signal by multiplying a value of the scaled input signal by a value of the shaping offset signal.

15. The circuit of claim 12 , wherein the current shape controller further includes a current regulator limiting the magnitude of the current of the rectified input signal to a threshold value.

16. The circuit of claim 15 , wherein the current regulator includes:

a signal selector comparing a value of the current shaping signal and the value of the phase angle signal and selecting one of the current shaping signal and the phase angle signal that has a smaller value to generate a selected signal;

an amplifier amplifying a difference between a value of the selected signal and a value of a sense signal, the sense signal indicating the magnitude of the current of the rectified input signal, the sense signal being output from a sensing node; and

a switching device having a gate coupled to an output of the amplifier and a source coupled to the sensing node.

17. The circuit of claim 15 , wherein the current regulator includes:

a first amplifier amplifying a difference between a value of the current shaping signal and the value of the phase angle signal;

a first switching device having a gate coupled to an output of the first amplifier and a source receiving the current shaping signal;

a second amplifier amplifying a difference between the value of the current shaping signal and a value of a sense signal, the sense signal being output from a sensing node; and

a second switching device having a gate coupled to an output of the second amplifier and a source coupled to the sensing node.

18. The circuit of claim 15 , wherein the current regulator includes:

an amplifier generating a control signal by amplifying a difference between a value of the current shaping signal and a value of a sense signal;

a control signal generator generating first and second output signals in response to the control signal;

a first switching device having a gate that receives the first output signal and a drain coupled to a first node between first and second LED strings;

a second switching device having a gate that receives the second output signal and a drain coupled to the second LED string; and

a second node coupled to a source of the first switching device and a source of the second switching device and providing the sense signal to the amplifier.

19. The circuit of claim 11 , wherein the phase angle detector includes:

a comparator having a non-inverting input that receives the voltage of the rectified input signal and an inverting input receiving a threshold voltage, the comparator generating a comparison signal in response to a comparison result; and

a counter circuit generating the phase angle signal in response to the comparison signal.

20. A light emitting diode (LED) driver comprising:

a phase angle detector configured to detect a phase angle of a rectified input signal and generate a phase angle signal indicative of the phase angle, the phase angle being a difference between a half period of the rectified input signal and a phase-cut of the rectified input signal; and

a current shape controller configured to adjust a magnitude of a current of the rectified input signal in response to the detected phase angle,

wherein the current shape controller increases the magnitude of the current of the rectified input signal in a time interval corresponding to the phase angle when the phase angle is decreased, the magnitude of the current of the rectified input signal being equal to that of a string current flowing through one or more LED strings.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 046530, FRAME 0494 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064159/0524 →
PATENT SECURITY AGREEMENT Recorded Jul 11, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046530/0494 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2017
From: EUM, HYUNCHUL
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 043850/0019 →
Continuity (2)
Provisional Application 62521838 · Jun 19, 2017
Related Publication 20180368224A1 · Dec 20, 2018