Semiconductor device comprising a transistor cell including a source contact in a trench, method for manufacturing the semiconductor device and integrated circuit

1. A method of manufacturing a semiconductor device comprising a transistor cell in a semiconductor substrate having a first main surface and a second main surface, the method comprising:

forming a source region;

forming a source contact electrically connected to the source region, the source contact comprising a first source contact portion and a second source contact portion, the second source contact portion being disposed at the second main surface;

forming a drain region;

forming a body region; and

forming a gate electrode in a gate trench in the first main surface adjacent to the body region, the gate electrode being configured to control a conductivity of a channel formed in the body region, a longitudinal axis of the gate trench extending in a first direction parallel to the first main surface,

the source region, the body region and the drain region being disposed along the first direction,

forming the first source contact portion comprises forming a source contact groove in the first main surface of the semiconductor substrate to a depth larger than a depth of the gate trench, and filling the source contact groove with a source conductive material such that the source conductive material is in direct contact with the source region, wherein the source conductive material extends partially into a first doped portion of the semiconductor substrate, and wherein the first doped portion includes a region arranged between the source conductive material and the second source contact portion;

forming the semiconductor substrate, wherein the semiconductor substrate comprises the first doped portion and a second doped portion having a same conductivity type, the first doped portion having a larger distance to the first main surface than the second doped portion, the first doped portion having a larger doping concentration than the second doped portion, the first doped portion being in direct contact with the first source contact portion; and

forming a drain contact electrically connected to the drain region, the drain contact being disposed in a drain contact groove, and wherein the drain contact groove at least partially extends into the second doped portion of the semiconductor substrate.

2. The method according to claim 1 , further comprising:

forming the drain contact groove to form the drain contact electrically connected to the drain region.

3. The method according to claim 2 , wherein forming the source contact groove and forming the drain contact groove comprises joint etching processes.

4. The method according to claim 1 , wherein:

forming the first doped portion comprises forming a contact portion in the first doped portion, the contact portion having a higher doping concentration than a remaining part of the first doped portion, and the contact portion formed in contact with the source conductive material.

5. The method according to claim 1 , wherein the first doped portion and the second doped portion of the semiconductor substrate are of a first conductivity type, and the source region and the drain region are of a second conductivity type.

6. The method according to claim 1 , performing a doping process to introduce dopants of a second conductivity type through a first portion of a sidewall of the source contact groove and to introduce dopants of a first conductivity type through a second portion of the sidewall of the source contact groove.

7. The method according to claim 6 , wherein performing the doping process comprises:

forming a diffusion material layer on a sidewall and a bottom side of the source contact groove;

patterning the diffusion material layer to uncover portions of the sidewall;

introducing dopants of the second conductivity type through the uncovered portions of the sidewall; and

performing a heat treatment to introduce dopants of the first conductivity type through covered portions of the sidewall.

8. The method according to claim 7 , wherein patterning the diffusion material layer is performed so as to uncover upper portions of the sidewall while leaving lower portions of the sidewall covered.

9. The method according to claim 6 , wherein the source region is formed at the first portion of the sidewall of the source contact groove by the doping process.

10. The method according to claim 6 , wherein:

forming the source region includes the doping process to introduce the dopants of the second conductivity type through the first portion of the sidewall of the source contact groove such that the source region is formed at the first portion of the sidewall of the source contact groove.

11. The method according to claim 6 , wherein a doped layer is formed at the second portion of the sidewall of the source contact groove by the doping process to introduce the dopants of the first conductivity type through the second portion of the sidewall of the source contact groove.

12. A semiconductor device comprising:

a semiconductor substrate having a first main surface; and

a transistor cell in the semiconductor substrate, the transistor cell comprising:

a source region;

a source contact electrically connected to the source region, the source contact comprising a first source contact portion and a second source contact portion;

a drain region;

a drain contact electrically connected to the drain region, the drain contact being disposed in a drain contact groove;

a body region; and

a gate electrode in a gate trench in the first main surface adjacent to the body region, the gate electrode being configured to control a conductivity of a channel in the body region, a longitudinal axis of the gate trench extending in a first direction parallel to the first main surface,

wherein the source region, the body region and the drain region being disposed along the first direction,

the second source contact portion being disposed at a second main surface of the semiconductor substrate, and

the first source contact portion comprising a source conductive material in direct contact with the source region and that extends partially into a first doped portion of the semiconductor substrate, wherein the first doped portion includes a region arranged between the source conductive material and the second source contact portion,

the semiconductor substrate comprises the first doped portion and a second doped portion having a same conductivity type, the first doped portion having a larger distance to the first main surface than the second doped portion, the first doped portion having a larger doping concentration than the second doped portion, the first doped portion being in direct contact with the first source contact portion, and

the drain contact groove at least partially extending into the second doped portion of the semiconductor substrate.