IP Library Granted Patent US 9,978,683
Granted Patent B2
US 9,978,683 · App. 15/785,931 · Granted May 22, 2018

Method for making semiconductor device with stacked analog components in back end of line (BEOL) regions

Inventor: John H. Zhang (Altamont, NY)
Assignee: STMICROELECTRONICS, INC.
H01L23/528H01L21/76805H01L21/76816H01L21/76831H01L21/76883H01L23/5223H01L23/5226H01L23/5228H01L23/53223H01L23/53238H01L23/53266
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Quick Facts
Patent No.
US 9,978,683
App. No.
15/785,931
Granted
May 22, 2018
Kind
B2
Abstract

A method for making a semiconductor device may include forming a first dielectric layer above a semiconductor substrate, forming a first trench in the first dielectric layer, filling the first trench with electrically conductive material, removing upper portions of the electrically conductive material to define a lower conductive member with a recess thereabove, forming a filler dielectric material in the recess to define a second trench. The method may further include filling the second trench with electrically conductive material to define an upper conductive member, forming a second dielectric layer over the first dielectric layer and upper conductive member, forming a first via through the second dielectric layer and underlying filler dielectric material to the lower conductive member, and forming a second via through the second dielectric layer to the upper conductive member.

Claims (51)

1. A device, comprising:

a first dielectric layer;

a first trench in the first dielectric layer;

a first conductive layer in the trench, the first conductive layer having a first area;

a second dielectric layer on the first conductive layer in the trench;

a second trench in the second dielectric layer; and

a second conductive layer in the second trench, the second conductive layer having a second area that is less than the first area.

2. The device of claim 1 , further comprising:

a first contact coupled to the first conductive layer in the first trench; and

a second contact coupled to the second conductive layer in the second trench.

3. The device of claim 2 , further comprising a third dielectric layer on the second conductive layer and on the second dielectric layer, the first and second contacts extending through the third dielectric layer.

4. The device of claim 1 , further comprising a third dielectric layer in the first trench between the first dielectric layer and the first conductive layer.

5. The device of claim 4 , further comprising a fourth dielectric layer in the second trench between the second dielectric layer and the second conductive layer.

6. The device of claim 1 , further comprising

a third dielectric layer on the second conductive layer in the first trench;

a third trench in the third dielectric layer; and

a third conductive layer in the third trench.

7. The device of claim 6 , further comprising:

a first contact coupled to the first conductive layer in the first trench;

a second contact coupled to the second conductive layer in the second trench; and

a third contact coupled to the third conductive layer in the third trench.

8. The device of claim 6 wherein the third conductive layer has a third area that is less than the second area.

9. A device, comprising:

a first dielectric layer;

a first trench in the first dielectric layer, the first trench having a first area, a first portion of the first area being more narrow than a second portion of the first area;

a first conductive layer in the first area of the first trench;

a second dielectric layer on the first conductive layer;

a second trench in the second dielectric layer, the second trench having a second area that is rectangular; and

a second conductive layer in the second area of the second trench.

10. The device of claim 9 , further comprising:

a first contact coupled to the first conductive layer in the first trench; and

a second contact coupled to the second conductive layer in the second trench.

11. The device of claim 10 , further comprising a third dielectric layer on the second conductive layer and on the second dielectric layer, the first and second contacts extending through the third dielectric layer.

12. The device of claim 9 , further comprising a third dielectric layer in the first trench between the first dielectric layer and the first conductive layer.

13. The device of claim 12 , further comprising a fourth dielectric layer in the second trench between the second dielectric layer and the second conductive layer.

14. A device, comprising:

a first dielectric layer;

a first trench in the first dielectric layer;

a second dielectric layer in the first trench;

a first conductive layer on the second dielectric layer;

a third dielectric layer on the first conductive layer;

a second trench in the third dielectric layer;

a fourth dielectric layer in the second trench; and

a second conductive layer on the fourth dielectric layer.

15. The device of claim 14 , further comprising a fifth dielectric layer on the second conducive layer.

16. The device of claim 14 , further comprising:

a first contact coupled to the first conductive layer in the first trench; and

a second contact coupled to the second conductive layer in the second trench.

17. The device of claim 16 , further comprising:

a third contact coupled to the first conductive layer in the first trench; and

a fourth contact coupled to the second conductive layer in the second trench.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2024
From: STMICROELECTRONICS, INC.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 068433/0816 →
Continuity (4)
Continuation 15499665 · Apr 27, 2017
Continuation 15082987 · Mar 28, 2016
Continuation 14574855 · Dec 18, 2014
Related Publication 20180040554A1 · Feb 8, 2018