Removal of artificial resonances using boundary element method
This application discloses a computing system configured to crop a layout design for an electronic device implemented with a layered interconnect, place a termination structure corresponding to a resistive sheet or a set of resistive components on an artificial boundary corresponding to an edge in the cropped portion of the layout design, and generate an electrical model of a signaling net in the cropped portion of the layout design by generating mesh elements on a surface area of the cropped portion of the layout design including the termination structure and utilizing a field solver implementing a Boundary Element Method based analysis to solve integral forms of Maxwell's equations corresponding to the mesh elements. The electrical model of the signaling net in the cropped portion of the layout design can include a set of scattering parameters for the signaling net in the cropped portion of the layout design.
1. A method comprising:
cropping, by a computing system, a layout design for an electronic device implemented with a layered interconnect;
placing, by the computing system, a termination structure on an artificial boundary corresponding to an edge in the cropped portion of the layout design, wherein the termination structure has an impedance corresponding to a characteristic impedance of a parallel-plate waveguide disposed between layers in the layered interconnect; and
generating, by the computing system, an electrical model of a signaling net in the cropped portion of the layout design based, at least in part, on the termination structure on the artificial boundary.
2. The method of claim 1 , wherein generating the electrical model of the signaling net further comprises:
generating mesh elements on a surface area of the cropped portion of the layout design and the termination structure, wherein each mesh element describes the corresponding portion of the surfaces area with at least one integral form of Maxwell's equations; and
utilizing a field solver implementing a Boundary Element Method (BEM) based analysis to solve the integral form of the Maxwell's equations, which generates the electrical model of the signaling net in the cropped portion of the layout design.
3. The method of claim 2 , wherein the electrical model of the signaling net in the cropped portion of the layout design includes a set of scattering parameters (S-Parameters) for the signaling net in the cropped portion of the layout design.
4. The method of claim 1 , further comprising generating, by the computing system, the termination structure for placement in the cropped portion of the layout design based, at least in part, on the characteristic impedance of the parallel-plate waveguide disposed between layers in the layered interconnect.
5. The method of claim 4 , wherein the termination structure corresponds to a resistive sheet having the impedance corresponding to the characteristic impedance of the parallel-plate waveguide disposed between layers in the layered interconnect, and having a conductivity dependent based, at least in part, on a frequency of the signal.
6. The method of claim 4 , wherein generating the termination structure further comprises dividing planes corresponding to at least one power distribution net terminating at the artificial boundary into multiple transmission lines, and generating the termination structure based on characteristic impedances of the transmission lines.
7. The method of claim 6 , wherein the termination structure corresponds to a set of resistive components coupled between plates of the power distribution net in the cropped portion of the layout design.
8. An apparatus comprising at least one computer-readable memory device storing instructions configured to cause one or more processing devices to perform operations comprising:
cropping a layout design for an electronic device implemented with a layered interconnect;
placing a termination structure on an artificial boundary corresponding to an edge in the cropped portion of the layout design, wherein the termination structure has an impedance corresponding to a characteristic impedance of a parallel-plate waveguide disposed between layers in the layered interconnect; and
generating an electrical model of a signaling net in the cropped portion of the layout design based, at least in part, on the termination structure on the artificial boundary.
9. The apparatus of claim 8 , wherein generating the electrical model of the signaling net further comprises:
generating mesh elements on a surface area of the cropped portion of the layout design and the termination structure, wherein each mesh element describes the corresponding portion of the surfaces area with at least one integral form of Maxwell's equations; and
utilizing a field solver implementing a Boundary Element Method (BEM) based analysis to solve the integral form of the Maxwell's equations, which generates the electrical model of the signaling net in the cropped portion of the layout design.
10. The apparatus of claim 9 , wherein the electrical model of the signaling net in the cropped portion of the layout design includes a set of scattering parameters (S-Parameters) for the signaling net in the cropped portion of the layout design.
11. The apparatus of claim 8 , wherein the instructions are configured to cause one or more processing devices to perform operations further comprising generating the termination structure for placement in the cropped portion of the layout design based, at least in part, on the characteristic impedance of the parallel-plate waveguide disposed between layers in the layered interconnect.
12. The apparatus of claim 11 , wherein the termination structure corresponds to a resistive sheet having the impedance corresponding to the characteristic impedance of the parallel-plate waveguide disposed between layers in the layered interconnect, and having a conductivity dependent based, at least in part, on a frequency of the signal.
13. The apparatus of claim 11 , wherein generating the termination structure further comprises dividing planes corresponding to at least one power distribution net terminating at the artificial boundary into multiple transmission lines, and generating the termination structure based on characteristic impedances of the transmission lines.
14. The apparatus of claim 13 , wherein the termination structure corresponds to a set of resistive components coupled between plates of the power distribution net in the cropped portion of the layout design.
15. A system comprising:
a memory system configured to store computer-executable instructions; and
a computing system, in response to execution of the computer-executable instructions, is configured to:
crop a layout design for an electronic device implemented with a layered interconnect;
place a termination structure on an artificial boundary corresponding to an edge in the cropped portion of the layout design, wherein the termination structure has an impedance corresponding to a characteristic impedance of a parallel-plate waveguide disposed between layers in the layered interconnect; and
generate an electrical model of a signaling net in the cropped portion of the layout design based, at least in part, on the termination structure on the artificial boundary.
16. The system of claim 15 , wherein the computing system, in response to execution of the computer-executable instructions, is further configured to:
generate mesh elements on a surface area of the cropped portion of the layout design and the termination structure, wherein each mesh element describes the corresponding portion of the surfaces area with at least one integral form of Maxwell's equations; and
utilize a field solver implementing a Boundary Element Method (BEM) based analysis to solve the integral form of the Maxwell's equations, which generates the electrical model of the signaling net in the cropped portion of the layout design.
17. The system of claim 16 , wherein the electrical model of the signaling net in the cropped portion of the layout design includes a set of scattering parameters (S-Parameters) for the signaling net in the cropped portion of the layout design.
18. The system of claim 15 , wherein the computing system, in response to execution of the computer-executable instructions, is further configured to generate the termination structure for placement in the cropped portion of the layout design based, at least in part, on the characteristic impedance of the parallel-plate waveguide disposed between layers in the layered interconnect.
19. The system of claim 18 , wherein the termination structure corresponds to a resistive sheet having the impedance corresponding to the characteristic impedance of the parallel-plate waveguide disposed between layers in the layered interconnect, and having a conductivity dependent based, at least in part, on a frequency of the signal.
20. The system of claim 18 , wherein the termination structure corresponds to a set of resistive components coupled between plates of a power distribution net in the cropped portion of the layout design.