Thermal management in integrated circuit using phononic bandgap structure
An encapsulated integrated circuit is provided that includes an integrated circuit (IC) die. An encapsulation material encapsulates the IC die. A phononic bandgap structure is included within the encapsulation material that is configured to have a phononic bandgap with a frequency range approximately equal to a range of frequencies of thermal phonons produced by the IC die when the IC die is operating.
1. An encapsulated integrated circuit comprising:
an integrated circuit (IC) die;
an encapsulation material encapsulating the IC die;
a phononic bandgap structure within the encapsulation material configured to have a phononic bandgap with a frequency range equal to a range of frequencies of thermal phonons produced by the IC die when the IC die is operating; and
a thermal pad on which the IC die is mounted;
in which the phononic bandgap structure is configured to direct thermal phonons produced by the IC die towards the thermal pad.
2. The encapsulated IC of claim 1 , wherein a portion of the phononic bandgap structure is located between the IC die and the thermal pad.
3. An encapsulated integrated circuit comprising:
an integrated circuit (IC) die;
an encapsulation material encapsulating the IC die; and
a phononic bandgap structure within the encapsulation material configured to have a phononic bandgap with a frequency range equal to a range of frequencies of thermal phonons produced by the IC die when the IC die is operating;
in which the phononic bandgap structure is configured to form a channel in which thermal phonons produced by a first portion of the IC die are directed to a second portion of the IC die.
4. An encapsulated integrated circuit comprising:
an integrated circuit (IC) die;
an encapsulation material encapsulating the IC die; and
a phononic bandgap structure within the encapsulation material configured to have a phononic bandgap with a frequency range equal to a range of frequencies of thermal phonons produced by the IC die when the IC die is operating;
in which the phononic bandgap structure includes a matrix of periodically spaced nodes within the encapsulation material, the encapsulation material has a first acoustic impedance, and the nodes have a second acoustic impedance that is different from the first acoustic impedance.
5. The encapsulated IC of claim 4 , wherein the second acoustic impedance is greater than the first acoustic impedance.
6. The encapsulated IC of claim 4 , wherein the second acoustic impedance is less than the first acoustic impedance.
7. An encapsulated integrated circuit comprising:
an integrated circuit (IC) die;
an encapsulation material encapsulating the IC die; and
a phononic bandgap structure within the encapsulation material configured to have a phononic bandgap with a frequency range equal to a range of frequencies of thermal phonons produced by the IC die when the IC die is operating;
in which the phononic bandgap structure includes filler particles diffused within the encapsulation material, the encapsulation material has a first acoustic impedance, and the filler particles have a second acoustic impedance that is different from the first acoustic impedance.
8. The encapsulated IC of claim 7 , wherein the second acoustic impedance is greater than the first acoustic impedance.
9. The encapsulated IC of claim 7 , wherein the second acoustic impedance is less than the first acoustic impedance.
10. An encapsulated integrated circuit comprising:
an integrated circuit (IC) die;
an encapsulation material encapsulating the IC die; and
a matrix of periodically spaced nodes within the encapsulation material, in which the periodically spaced nodes are formed with a material that is different from the encapsulation material, a first portion of the matrix of periodically spaced nodes has a first lattice constant, and a second portion of the matrix of periodically spaced nodes has a second lattice constant.
11. An encapsulated integrated circuit comprising:
an integrated circuit (IC) die;
an encapsulation material encapsulating the IC die; and
a matrix of periodically spaced nodes within the encapsulation material, in which the periodically spaced nodes are formed with a material that is different from the encapsulation material, and nodes are omitted from a region within the matrix of periodically spaced nodes to form a channel or a layer.
12. An encapsulated integrated circuit comprising:
an integrated circuit (IC) die;
an encapsulation material encapsulating the IC die;
a matrix of periodically spaced nodes within a layer of the encapsulation material, in which the periodically spaced nodes are formed with a material that is different from the encapsulation material;
a thermal pad on which the IC die is mounted;
in which the layer of the encapsulation material including the matrix of periodically spaced nodes is positioned between the IC die and the thermal pad.