Local path-based analysis for circuit place and route optimization
A database is constructed based on a batch PBA performed on a plurality of paths of an integrated circuit. A local PBA is performed on a portion of a selected path. A selected optimization move is identified on the portion of the selected path, based on a result of the local PBA that best meets a set of constraints. A path-wide PBA is performed for an updated path that is based on the selected path incorporating the selected optimization move. The selected optimization move is committed in a netlist associated with the integrated circuit.
1. A method, comprising:
constructing a database based on a batch path-based analysis (PBA) performed on a plurality of paths of an integrated circuit;
performing a local PBA on a portion of a selected path;
identifying a selected optimization move on the portion of the selected path, based on a result of the local PBA that best meets a set of constraints;
performing a path-wide PBA for an updated path that is based on the selected path incorporating the selected optimization move, wherein the performing of the path-wide PBA includes performing a PBA on a whole path including the updated path; and
committing the selected optimization move in a netlist associated with the integrated circuit.
2. The method of claim 1 , wherein the selected path contains a pin in a local evaluation window.
3. The method of claim 1 , wherein performing a path-wide PBA comprises performing a path-wide global PBA evaluation.
4. The method of claim 1 , wherein performing a path-wide PBA comprises performing a path-wide global PBA evaluation for an updated path with dirty pins.
5. The method of claim 1 , further comprising performing a path-wide global PBA update.
6. The method of claim 1 , further comprising performing a path-wide global PBA update in an event that an optimization needs a reversal.
7. The method of claim 1 , further comprising performing a path-wide global PBA update in an event that an optimization needs a reversal of a move in order to restore a PBA database to its original status.
8. The method of claim 1 , wherein constructing comprises creating a heap for a pin, wherein the heap comprises path information of one or more paths associated with the pin.
9. The method of claim 1 , wherein the selected path is a critical path for timing optimization.
10. The method of claim 1 , wherein identifying a selected optimization move comprises selecting optimization for meeting timing requirements in the event the selected path is a critical path.
11. The method of claim 1 , wherein the selected path is a non-critical path for power/area optimization.
12. The method of claim 1 , wherein the selected path is a non-critical path for power/area optimization, and wherein the non-critical path is dynamically inserted into a PBA database for power/area optimization.
13. The method of claim 1 , wherein identifying a selected optimization move comprises selecting optimization for optimizing power and area in the event the selected path is a non-critical path with positive slack.
14. A system, comprising:
a processor configured to:
construct a database based on a batch path-based analysis (PBA) performed on a plurality of paths of an integrated circuit;
perform a local PBA on a portion of a selected path;
identify a selected optimization move on the portion of the selected path, based on a result of the local PBA that best meets a set of constraints;
perform a path-wide PBA for an updated path that is based on the selected path incorporating the selected optimization move, wherein the performing of the path-wide PBA includes to perform a PBA on a whole path including the updated path; and
commit the selected optimization move in a netlist associated with the integrated circuit; and
a memory coupled to the processor and configured to provide the processor with instructions.
15. The system of claim 14 , wherein the selected path is a critical path for timing optimization.
16. The system of claim 14 , wherein the selected path is a non-critical path for power/area optimization.
17. The system of claim 14 , wherein identifying a selected optimization move comprises selecting optimization for optimizing power and area in the event the selected path is a non-critical path with positive slack.
18. A computer program product, the computer program product being embodied in a non-transitory computer readable storage medium and comprising computer instructions for:
constructing a database based on a batch path-based analysis (PBA) performed on a plurality of paths of an integrated circuit;
performing a local PBA on a portion of a selected path;
identifying a selected optimization move on the portion of the selected path, based on a result of the local PBA that best meets a set of constraints;
performing a path-wide PBA for an updated path that is based on the selected path incorporating the selected optimization move, wherein the performing of the path-wide PBA includes performing a PBA on a whole path including the updated path; and
committing the selected optimization move in a netlist associated with the integrated circuit.
19. The computer program product of claim 18 , wherein the selected path is a critical path for timing optimization.
20. The computer program product of claim 18 , wherein the selected path is a non-critical path for power/area optimization.