IP Library Granted Patent US 10,296,700
Granted Patent B1
US 10,296,700 · App. 15/793,643 · Granted May 21, 2019

Multimode circuit place and route optimization

Inventors: Geng Bai (Fremont, CA); Chao-Yung Wang (Taipei, TW); Ping-San Tzeng (Fremont, CA)
Assignee: Avatar Integrated Systems, Inc.
G06F17/5077G06F16/283G06F16/9024G06F17/30592G06F17/30958G06F2217/02G06F2217/06G06F2217/84
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Quick Facts
Patent No.
US 10,296,700
App. No.
15/793,643
Granted
May 21, 2019
Kind
B1
Abstract

A plurality of multi-corner multimode (MCMM) databases are accessed, wherein at least one of the plurality of MCMM databases corresponds to a first optimization scenario, and at least one of the plurality of MCMM databases corresponds to a second optimization scenario. A first optimization move is performed on paths in the first optimization scenario. The first optimization move is verified using GBA on paths in the second optimization scenario to determine that the first optimization move does not cause timing violations outside an MCMM database associated with the first optimization scenario.

Claims (31)

1. A method, comprising:

accessing a plurality of multi-corner multimode (MCMM) databases, wherein at least one of the plurality of MCMM databases corresponds to a first optimization scenario, and at least one of the plurality of MCMM databases corresponds to a second optimization scenario;

performing a first optimization move on paths in the first optimization scenario; and

verifying the first optimization move using graph-based analysis (GBA) on paths in the second optimization scenario to determine that the first optimization move does not cause timing violations outside an MCMM database associated with the first optimization scenario.

2. The method of claim 1 , wherein verifying includes using calibrated GBA timing.

3. The method of claim 1 , wherein the first optimization scenario is a hold optimization scenario.

4. The method of claim 1 , wherein the first optimization scenario is a power optimization scenario.

5. The method of claim 1 , wherein the first optimization scenario is an area optimization scenario.

6. The method of claim 1 , wherein the second optimization scenario is a timing optimization scenario.

7. The method of claim 1 , further comprising verifying the first optimization move using path-based analysis (PBA) on paths associated with the first optimization scenario.

8. The method of claim 1 , further comprising calculating slack margin as a spread between worst PBA slack and worst GBA slack.

9. The method of claim 1 , wherein verifying includes using calculated slack margin to GBA timing for all scenarios.

10. The method of claim 1 , wherein verifying includes using initial GBA timing for worst negative slack (WNS) and/or total negative slack (TNS) for PBA timing.

11. A system, comprising:

a processor configured to:

access a plurality of multi-corner multimode (MCMM) databases, wherein at least one of the plurality of MCMM databases corresponds to a first optimization scenario, and at least one of the plurality of MCMM databases corresponds to a second optimization scenario;

perform a first optimization move on paths in the first optimization scenario; and

verify the first optimization move using graph-based analysis (GBA) on paths in the second optimization scenario to determine that the first optimization move does not cause timing violations outside an MCMM database associated with the first optimization scenario; and

a memory coupled to the processor and configured to provide the processor with instructions.

12. The system of claim 11 , wherein verifying includes using calibrated GBA timing.

13. The system of claim 11 , wherein the processor is further configured to verify the first optimization move using PBA on paths associated with the first optimization scenario.

14. The system of claim 11 , wherein the processor is further configured to calculate slack margin as a spread between worst PBA slack and worst GBA slack.

15. The system of claim 11 , wherein verifying includes using initial GBA timing for worst WNS and/or TNS for PBA timing.

16. A computer program product, the computer program product being embodied in a non-transitory computer readable storage medium and comprising computer instructions for:

accessing a plurality of multi-corner multimode (MCMM) databases, wherein at least one of the plurality of MCMM databases corresponds to a first optimization scenario, and at least one of the plurality of MCMM databases corresponds to a second optimization scenario;

performing a first optimization move on paths in the first optimization scenario; and

verifying the first optimization move using graph-based analysis (GBA) on paths in the second optimization scenario to determine that the first optimization move does not cause timing violations outside an MCMM database associated with the first optimization scenario.

17. The computer program product of claim 16 , wherein verifying includes using calibrated GBA timing.

18. The computer program product of claim 16 , further comprising computer instructions for verifying the first optimization move using PBA on paths associated with the first optimization scenario.

19. The computer program product of claim 16 , further comprising computer instructions for calculating slack margin as a spread between worst PBA slack and worst GBA slack.

20. The computer program product of claim 16 , wherein verifying includes using initial GBA timing for worst WNS and/or TNS for PBA timing.

Assignments (4)
MERGER AND CHANGE OF NAME Recorded Dec 2, 2020
From: AVATAR INTEGRATED SYSTEMS, INC.; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 054514/0076 →
RELEASE OF SECURITY INTEREST Recorded Aug 21, 2020
From: MENTOR GRAPHICS CORPORATION
To: AVATAR INTEGRATED SYSTEMS, INC.
Reel/Frame 053558/0632 →
SECURITY INTEREST Recorded Jul 16, 2020
From: AVATAR INTEGRATED SYSTEMS, INC.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 053224/0268 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2018
From: BAI, GENG; WANG, CHAO-YUNG; TZENG, PING-SAN
To: AVATAR INTEGRATED SYSTEMS, INC.
Reel/Frame 044719/0142 →