IP Library Patent Application 15793968
Patent Application
App. No. 15/793,968

Configurable Computing-Array Package

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Quick Facts
Patent No.
US None
App. No.
15/793,968
Abstract

The present invention discloses a configurable computing-array package. It comprises a configurable computing die including an array of configurable computing elements and a configurable logic die including an array of configurable logic elements. Each configurable computing element comprises at least a writable-memory array, which stores at least a portion of a look-up table (LUT) for a math function.

Claims (29)

1 . A configurable computing-array package, comprising:

a configurable computing die comprising at least a configurable computing element for storing at least a portion of a look-up table (LUT) for a math function;

a configurable logic die comprising at least a configurable logic element for selectively realizing a logic function from a logic library;

a plurality of inter-die connections for coupling said configurable computing die and said configurable logic die;

wherein said configurable computing-array package realizes a math function by programming said configurable computing element and said configurable logic element.

2 . The configurable computing-array package according to claim 1 , further comprising at least a configurable interconnect for selectively coupling said configurable computing element and said configurable logic element.

3 . The configurable computing-array package according to claim 2 , wherein said configurable interconnect is located on said configurable computing die.

4 . The configurable computing-array package according to claim 2 , wherein said configurable interconnect is located on said configurable logic die.

5 . The configurable computing-array package according to claim 1 , wherein said configurable computing element comprises a writable-memory array.

6 . The configurable computing-array package according to claim 1 , wherein said inter-die connections are micro-bumps.

7 . The configurable computing-array package according to claim 1 , wherein said inter-die connections are through-silicon-vias (TSV).

8 . The configurable computing-array package according to claim 1 , further comprising at least one multiplier.

9 . The configurable computing-array package according to claim 1 , wherein said configurable computing die and said configurable logic die are vertically stacked.

10 . A configurable computing-array package, comprising:

a configurable computing die comprising at least a configurable computing element for storing at least a portion of a look-up table (LUT) for a math function;

a configurable logic die comprising at least a configurable logic element for selectively realizing a logic function from a logic library;

at least a configurable interconnect for selectively realizing an interconnect from an interconnect library;

a plurality of inter-die connections for coupling said configurable computing die and said configurable logic die;

wherein said configurable computing-array package realizes a math function by programming said configurable computing element, said configurable logic element and said configurable interconnect.

11 . The configurable computing-array package according to claim 10 , wherein said configurable interconnect selectively couples said configurable computing element and said configurable logic element.

12 . The configurable computing-array package according to claim 10 , wherein said configurable interconnect is located on said configurable computing die.

13 . The configurable computing-array package according to claim 10 , wherein said configurable interconnect is located on said configurable logic die.

14 . The configurable computing-array package according to claim 10 , wherein said configurable computing element comprises a writable-memory array.

15 . The configurable computing-array package according to claim 14 , wherein said writable-memory array is a RAM array or a ROM array.

16 . The configurable computing-array package according to claim 14 wherein said writable-memory array is re-programmable and said configurable computing element can be re-configured to realize different math functions.

17 . The configurable computing-array package according to claim 10 , wherein said inter-die connections are micro-bumps.

18 . The configurable computing-array package according to claim 10 , wherein said inter-die connections are through-silicon-vias (TSV).

19 . The configurable computing-array package according to claim 10 , further comprising at least one multiplier.

20 . The configurable computing-array package according to claim 10 , wherein said configurable computing die and said configurable logic die are vertically stacked.