Reflow enhancement layer for metallization structures

1. A method of forming a semiconductor structure, the method comprising:

providing an opening in a dielectric-containing substrate;

forming a reflow enhancement layer in the opening and atop the dielectric-containing substrate;

forming a layer of a contact metal or metal alloy on the reflow enhancement layer;

performing a reflow anneal to completely fill a remaining volume of the opening with the contact metal or metal alloy of the layer of contact metal or metal alloy; and

removing the layer of contact metal or metal alloy, and the reflow enhancement layer located outside of the opening, wherein a portion of the layer of contact metal or metal alloy, and a portion of the reflow enhancement layer remain within the opening, and wherein the portion of the layer of contact metal or metal alloy that remains in the opening has a sidewall that is in direct physical contact with an inner sidewall of the portion of the reflow enhancement layer that remains in the opening.

2. The method of claim 1 , wherein the remaining portion of the reflow enhancement layer and the remaining portion of the layer of contact metal or metal alloy have topmost surfaces that are coplanar with each other and are located entirely within the opening.

3. The method of claim 1 , wherein the removing the layer of contact metal or metal alloy, and the reflow enhancement layer outside of the opening comprises a planarization process.

4. The method of claim 1 , wherein prior to forming the reflow enhancement layer, a diffusion barrier layer is formed in the opening and atop the dielectric-containing structure.

5. The method of claim 1 , wherein the reflow anneal is a thermal anneal performed in a nitrogen-containing ambient and at a temperature from 100° C. to 500° C.

6. The method of claim 1 , wherein the reflow enhancement layer is of a different composition than the layer of contact metal or metal alloy.

7. The method of claim 1 , wherein the dielectric-containing structure is composed entirely of a middle-of-the-line dielectric material layer.

8. The method of claim 1 , wherein the opening physically exposes a portion of a topmost surface of a substrate.

9. The method of claim 1 , wherein prior to forming the reflow enhancement layer, a material stack of a gate dielectric material and a work function metal is formed in the opening and atop the dielectric-containing structure.

10. The method of claim 9 , wherein the dielectric-containing structure contains dielectric spacers located at sidewalls of the opening.

11. The method of claim 1 , wherein the layer of contact metal or metal alloy comprises cobalt.

12. The method of claim 11 , wherein the reflow enhancement layer is composed of a metal or metal alloy selected from the group consisting of ruthenium, iridium, a tantalum-iridium alloy, a niobium-ruthenium alloy and a niobium-iridium alloy.

13. A method of forming a semiconductor structure, the method comprising:

providing a gate cavity in a material stack of, from bottom to top, a semiconductor fin and a middle-of-the-line (MOL) dielectric material, wherein sidewalls of the gate cavity are entirely lined with a dielectric spacer;

forming a gate dielectric material in the gate cavity and on each dielectric spacer and the MOL dielectric material;

forming a work function metal on the gate dielectric material;

forming a reflow enhancement layer on the work function metal;

forming a layer of a contact metal or metal alloy on the reflow enhancement layer;

performing a reflow anneal to completely fill a remaining volume of the gate cavity with the contact metal or metal alloy of the layer of contact metal or metal alloy; and

removing the layer of contact metal or metal alloy, the reflow enhancement layer, the work function metal and the gate dielectric material located outside of the gate cavity, wherein a portion of the layer of contact metal or metal alloy, a portion of the reflow enhancement layer, a portion of the work function metal, and a portion of the gate dielectric material remain within the gate cavity, and wherein the portion of the layer of contact metal or metal alloy that remains in the gate cavity has a sidewall that is in direct physical contact with an inner sidewall of the portion of the reflow enhancement layer that remains in the gate cavity.

14. The method of claim 13 , wherein the reflow anneal is a thermal anneal performed in a nitrogen-containing ambient and at a temperature from 100° C. to 500° C.

15. The method of claim 13 , wherein the portion of the layer of contact metal or metal alloy, the portion of the reflow enhancement layer, the portion of the work function metal, and the portion of the gate dielectric material that remain within the gate cavity have topmost surfaces that are coplanar with each other.

16. The method of claim 15 , wherein the topmost surfaces of the portion of the layer of contact metal or metal alloy, the portion of the reflow enhancement layer, the portion of the work function metal, and the portion of the gate dielectric material that remain within the gate cavity are located beneath a topmost surface of the MOL dielectric material.

17. The method of claim 16 , further comprising forming a gate cap on the topmost surfaces of the portion of the layer of contact metal or metal alloy, the portion of the reflow enhancement layer, the portion of the work function metal, and the portion of the gate dielectric material that remain within the gate cavity.

18. The method of claim 13 , wherein the reflow enhancement layer is of a different composition than the layer of contact metal or metal alloy.

19. The method of claim 18 , wherein the layer of contact metal or metal alloy comprises cobalt.

20. The method of claim 19 , wherein the reflow enhancement layer is composed of a metal or metal alloy selected from the group consisting of ruthenium, iridium, a tantalum-iridium alloy, a niobium-ruthenium alloy and a niobium-iridium alloy.