Tone inversion integration for phase change memory
Embodiments of the invention are directed to methods and resulting structures for forming a storage element using phase change memory (PCM). In a non-limiting embodiment of the invention, a PCM layer is formed over a surface of a bottom electrode. A top electrode is formed over the PCM layer using a tone inversion process that includes a sacrificial layer. A PCM pillar is then formed by patterning the PCM layer to expose a surface of the bottom electrode. The tone inversion process enables a sub-50 nm PCM pillar diameter.
1. A method for forming a semiconductor device, the method comprising:
forming a phase change memory (PCM) layer over a surface of a bottom electrode;
forming a top electrode over the PCM layer using a tone inversion process comprising the formation of a sacrificial layer; and
forming a PCM pillar by patterning the PCM layer to expose a surface of the bottom electrode.
2. The method of claim 1 , wherein the top electrode serves as an etch mask while forming the PCM pillar.
3. The method of claim 1 , wherein the PCM pillar comprises a germanium-antimony-tellurium (GST) ternary compound.
4. The method of claim 1 , wherein the top electrode comprises a three layer ring electrode.
5. The method of claim 1 , wherein the sacrificial layer comprises a two layer layer stack having a first sacrificial layer and a second sacrificial layer.
6. The method of claim 1 , wherein the bottom electrode is electrically isolated between two portions of a dielectric layer.
7. The method of claim 1 , wherein the tone inversion process further comprises forming a high aspect ratio hard mask by filling a trench in the sacrificial layer.
8. The method of claim 1 , wherein the PCM pillar comprises a diameter of less than about 60 nm.
9. The method of claim 1 , wherein the PCM pillar comprises a diameter of about 10 nm to about 60 nm.
10. A method for forming a semiconductor device, the method comprising:
forming a phase change memory (PCM) layer over a surface of a bottom electrode;
forming an etch stop layer over the PCM layer;
forming a sacrificial layer over the etch stop layer;
forming a trench to expose a surface of the etch stop layer;
forming a top electrode over the sacrificial layer, a portion of the top electrode filling the trench;
removing the sacrificial layer; and
forming a PCM pillar by patterning the PCM layer to expose a surface of the bottom electrode.
11. The method of claim 10 further comprising forming a dielectric layer over a top surface of the top and bottom electrodes.
12. The method of claim 11 further comprising planarizing the dielectric layer to the top surface of the top electrode.
13. The method of claim 10 , wherein the top electrode comprises a three layer ring electrode.
14. The method of claim 10 , wherein the sacrificial layer comprises a two layer layer stack having a first sacrificial layer and a second sacrificial layer.
15. The method of claim 10 , wherein the bottom electrode is electrically isolated between two portions of a dielectric layer.
16. The method of claim 10 , wherein the tone inversion process further comprises forming a high aspect ratio hard mask by filling a trench in the sacrificial layer.
17. The method of claim 10 , wherein the PCM pillar comprises a diameter of about 10 nm to about 60 nm.