IP Library › Granted Patent US 10,545,385
Granted Patent B2
US 10,545,385 · App. 15/802,746 · Granted Jan 28, 2020

Display device

Inventor: Sungchul Hong (Asan-si, KR)
Assignee: Samsung Display Co., Ltd.
G02F1/13454G02F1/133345G02F1/136213G02F1/136286G06F3/044G09G3/36H01L27/3248G09G2310/0267G09G2310/0286G09G2320/0209
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Quick Facts
Patent No.
US 10,545,385
App. No.
15/802,746
Granted
Jan 28, 2020
Kind
B2
Abstract

A display device includes a gate line, a gate driver, a clock-signal structure, and a connection structure. The gate driver is electrically connected to the gate line. The clock line may transmit a clock signal and includes a plurality of clock members and a first linking member. The first linking member electrically connects the plurality of clock members to each other and is angled relative to each of the plurality of clock members. The connection structure electrically connects the clock-signal structure and the gate driver and includes a plurality of connection members and a second linking member. The second linking member electrically connects the plurality of connection members to each other, is angled relative to each of the plurality of connection members, and crosses the first linking member.

Claims (34)

1. A display device comprising:

a substrate;

a gate line extending in a first direction and overlapping the substrate;

a gate driver electrically connected to the gate line;

a clock-signal structure configured for transmitting a clock signal and comprising a plurality of clock members and a first linking member, wherein the first linking member electrically connects the plurality of clock members to each other and is angled relative to the plurality of clock members;

a connection structure electrically connecting the clock-signal structure and the gate driver and comprising a plurality of connection members and a second linking member, wherein the second linking member electrically connects the plurality of connection members to each other, is angled relative to the plurality of connection members, and crosses the first linking member; and

a conductive layer electrically connecting the plurality of clock members to the plurality of connection members,

wherein the plurality of clock members and the plurality of connection members are located on different layers.

2. The display device of claim 1 , wherein each of the plurality of clock members is spaced from each of the plurality of connection members in a plan view of the display device.

3. The display device of claim 1 , wherein the first linking member and the second linking member have a zigzag shape in a plan view of the display device.

4. The display device of claim 1 , wherein the plurality of clock members are arranged alternately on left and right sides with respect to the first linking member and the second linking member.

5. The display device of claim 1 , wherein the plurality of connection members are arranged alternately on left and right sides with respect to the first linking member and the second linking member.

6. The display device of claim 1 , further comprising:

a gate insulating layer directly contacting each of the substrate and the clock-signal structure;

a protective layer directly contacting each of the gate insulating layer and the connection structure; and

a conductive layer directly contacting each of the plurality of clock members and the plurality of connection member.

7. The display device of claim 6 , wherein the gate insulating layer and the protective layer have a plurality of first-type contact holes, and

wherein the conductive layer contacts the plurality of clock members through the first-type contact holes.

8. The display device of claim 7 , wherein portions of the conductive layer are respectively positioned inside the first-type contact holes.

9. The display device of claim 6 , wherein the protective layer has a plurality of second-type contact holes, and

wherein the conductive layer contacts the plurality of connection members through the second-type contact holes.

10. The display device of claim 9 , wherein parts of the conductive layer are respectively positioned inside the second-type contact holes.

11. The display device of claim 1 , wherein the clock-signal structure comprises a clock line, wherein a width of the clock line in the first direction is less than a width of one of the plurality of clock members in the first direction.

12. The display device of claim 11 , wherein a ratio between the width of the clock line in the first direction and the width of one of the plurality of clock members in the first direction is in a range from 1:2 to 1:10.

13. The display device of claim 11 , wherein the width of the clock line in the first direction is in a range from 20 μm to 30 μm.

14. The display device of claim 1 , wherein the clock-signal structure directly contacts a face of the substrate, and wherein the gate line directly contacts the face of the substrate.

15. The display device of claim 1 ,

wherein the plurality of clock members extend parallel to one another, and are not aligned with one another in the first direction in a plan view of the display device.

16. The display device of claim 1 ,

wherein the plurality of connection members extend parallel to one another, and are not aligned with one another in the first direction in a plan view of the display device.

17. The display device of claim 1 ,

wherein the plurality of clock members are respectively aligned with the plurality of connection members in the first direction in a plan view of the display device.

18. The display device of claim 17 ,

wherein the plurality of clock members and the plurality of connection members are alternately disposed in a second direction perpendicular to the first direction in a plan view of the display device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 3, 2017
From: HONG, SUNGCHUL
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 044027/0618 →
Priority Claims (1)
KR 10-2016-0146754 · Nov 4, 2016 · national
Continuity (1)
Related Publication 20180129093A1 · May 10, 2018