Memory devices and method of manufacturing the same
A method of manufacturing memory devices is provided in the present invention. The method includes the steps of providing a substrate with multiple capacitors, wherein the capacitor includes a lower electrode layer, an insulating layer and an upper electrode layer and a top plate, forming a tungsten layer on the upper electrode, performing a nitriding plasma treatment to the tungsten layer to form a tungsten nitride layer, and forming a pre-metal dielectric layer on the tungsten nitride layer.
1. A method of manufacturing memory devices, comprising:
providing a substrate with multiple capacitors formed on said substrate, wherein each of said multiple capacitors comprises a lower electrode layer, an insulating layer, an upper electrode layer and a top plate directly contacting said upper electrode layer;
forming a tungsten layer directly contacting said top plate;
performing a nitriding plasma treatment to a surface portion of said tungsten layer to form a tungsten nitride layer on said tungsten layer; and
forming a dielectric layer directly on said tungsten nitride layer.
2. The method of manufacturing memory devices of claim 1 , wherein said nitriding plasma treatment is an ammonia plasma treatment.
3. The method of manufacturing memory devices of claim 1 , wherein said nitriding plasma treatment is a remote plasma treatment.
4. The method of manufacturing memory devices of claim 1 , wherein said tungsten layer is formed by plasma-enhanced chemical vapor deposition.
5. The method of manufacturing memory devices of claim 4 , wherein said nitriding plasma treatment is an in-situ plasma treatment in said plasma-enhanced chemical vapor deposition.
6. A method of manufacturing memory devices, comprising:
providing a substrate with multiple capacitors formed on said substrate, wherein said capacitor comprises a lower electrode layer, an insulating layer, an upper electrode layer and a top plate directly contacting said upper electrode layer;
forming a tungsten layer directly contacting on said top plate;
performing an oxidizing plasma treatment to a surface portion of said tungsten layer to form a tungsten oxide layer on said tungsten layer; and
forming a dielectric layer directly on said tungsten oxide layer.
7. The method of manufacturing memory devices of claim 6 , wherein said oxidizing plasma treatment uses at least one of N 2 O, CO 2 and CO.
8. The method of manufacturing memory devices of claim 6 , wherein said oxidizing plasma treatment is a remote plasma treatment.
9. The method of manufacturing memory devices of claim 6 , wherein said tungsten layer is formed by plasma-enhanced chemical vapor deposition.
10. The method of manufacturing memory devices of claim 9 , wherein said oxidizing treatment is an in-situ treatment in said plasma-enhanced chemical vapor deposition.
11. A memory devices, comprising:
a substrate;
multiple capacitors on said substrate, wherein each of said multiple capacitors comprises:
a lower electrode layer on said substrate;
an insulating layer on said lower electrode layer;
an upper electrode on said insulating layer;
a top plate directly contacting said upper electrodes of multiple capacitors;
a tungsten layer directly contacting said top plate;
a tungsten nitride layer on said tungsten layer; and
a dielectric layer directly on said tungsten nitride layer.
12. The memory devices of claim 11 , wherein said tungsten nitride layer is a conformal layer.
13. The memory devices of claim 11 , wherein material of said top plate is a silicon-germanium.
14. The memory devices of claim 11 , further comprising a native tungsten oxide layer between said tungsten layer and said tungsten nitride layer.
15. The memory devices of claim 11 , wherein material of said lower electrode layer and said upper electrode layer is titanium nitride.
16. The memory devices of claim 11 , wherein said insulating layer is a stack of alternative ZrO 2 —Al 2 O 3 —ZrO 2 (ZAZ) films.
17. The memory devices of claim 11 , wherein said dielectric layer includes single dielectric layer or multiple dielectric layers.
18. The memory devices of claim 11 , wherein material of said dielectric layer includes silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon carbon nitride, or a combination thereof.