Imaging pixels with a fully depleted charge transfer path
An imaging pixel may have a fully depleted charge transfer path between a pinned photodiode and a floating diffusion region. A pinned transfer diode may be coupled between the pinned photodiode and the floating diffusion region. The imaging pixel may be formed in upper and lower substrates with an interconnect layer coupling the upper substrate to the lower substrate. The imaging pixel may include one or more storage diodes coupled between the transfer diode and the floating diffusion region. The imaging pixel may be used to capture high dynamic range images with flicker mitigation, images synchronized with light sources, or for high frame rate operation.
1. An imaging pixel comprising:
an upper substrate;
a lower substrate;
a charge depleted interconnect layer that couples the upper substrate to the lower substrate;
a pinned photodiode with a first potential in the upper substrate;
a floating diffusion region with a second potential in the lower substrate, wherein the second potential is higher than the first potential;
a transfer transistor coupled between the pinned photodiode and the floating diffusion region, wherein the transfer transistor and the charge depleted interconnect layer form a fully depleted charge transfer path between the pinned photodiode and the floating diffusion region.
2. The imaging pixel defined in claim 1 , wherein the charge depleted interconnect layer comprises charge depleted polymer.
3. The imaging pixel defined in claim 1 , wherein the charge depleted interconnect layer comprises charge depleted silicon.
4. The imaging pixel defined in claim 1 , wherein the charge depleted interconnect layer comprises charge depleted germanium.
5. The imaging pixel defined in claim 1 , further comprising:
a dielectric layer interposed between the upper substrate and the lower substrate, wherein the charge depleted interconnect layer is formed in the dielectric layer.
6. The imaging pixel defined in claim 1 , further comprising:
a first transfer diode in the upper substrate that is interposed between the pinned photodiode and the charge depleted interconnect layer, wherein the first transfer diode has a third potential that is higher than the first potential and lower than the second potential.
7. The imaging pixel defined in claim 6 , wherein the fully depleted charge transfer path between the pinned photodiode and the floating diffusion region also includes the first transfer diode.
8. The imaging pixel defined in claim 6 , further comprising:
a second transfer diode in the lower substrate that is interposed between the charge depleted interconnect layer and the floating diffusion region, wherein the second transfer diode has a fourth potential that is higher than the third potential and lower than the second potential.
9. The imaging pixel defined in claim 8 , wherein the fully depleted charge transfer path between the pinned photodiode and the floating diffusion region also includes the first transfer diode and the second transfer diode.
10. The imaging pixel defined in claim 9 , further comprising:
a first storage diode in the lower substrate that is interposed between the second transfer diode and the floating diffusion region; and
a second storage diode in the lower substrate that is interposed between the second transfer diode and the floating diffusion region.
11. An imaging pixel comprising:
an upper substrate;
a lower substrate;
a charge depleted interconnect layer that couples the upper substrate to the lower substrate;
a photodiode in the upper substrate;
a floating diffusion region in the lower substrate; and
a transfer transistor coupled between the photodiode and the floating diffusion region, wherein the transfer transistor and the charge depleted interconnect layer form a fully depleted charge transfer path between the photodiode and the floating diffusion region.
12. The imaging pixel defined in claim 11 , wherein the charge depleted interconnect layer comprises charge depleted polymer.
13. The imaging pixel defined in claim 11 , wherein the charge depleted interconnect layer comprises charge depleted silicon.
14. The imaging pixel defined in claim 11 , wherein the charge depleted interconnect layer comprises charge depleted germanium.
15. The imaging pixel defined in claim 11 , further comprising:
a dielectric layer interposed between the upper substrate and the lower substrate, wherein the charge depleted interconnect layer is formed in the dielectric layer.
16. An imaging pixel comprising:
an upper substrate;
a lower substrate;
a photodiode in the upper substrate;
a floating diffusion region in the lower substrate; and
a charge depleted interconnect layer that is interposed in a charge transfer path between the photodiode and the floating diffusion region.
17. The imaging pixel defined in claim 16 , wherein the charge depleted interconnect layer comprises charge depleted polymer.
18. The imaging pixel defined in claim 16 , wherein the charge depleted interconnect layer comprises charge depleted silicon.
19. The imaging pixel defined in claim 16 , wherein the charge depleted interconnect layer comprises charge depleted germanium.
20. The imaging pixel defined in claim 16 , further comprising:
a dielectric layer interposed between the upper substrate and the lower substrate, wherein the charge depleted interconnect layer is formed in the dielectric layer.