Reducing uncorrectable errors based on a history of correctable errors
View Patent ↗In some embodiments, a computer-implemented method includes maintaining two or more error indicators for correctable errors occurring at two or more memory components. Each of the error indicators may be associated with a corresponding memory component. A correctable error may be detected as occurring during a first memory fetch operation at a first memory component. A first error indicator corresponding to the first memory component may be set, responsive to the correctable error at the first memory component. An uncorrectable error may be detected during a second memory fetch operation. It may be detected that the first error indicator is set. The first memory component may be marked, responsive to the uncorrectable error and to detecting that the first error indicator is set. The two or more error indicators for correctable errors may thus determine which memory component to mark due to the uncorrectable error.
1. A computer-implemented method comprising:
maintaining two or more error indicators for correctable errors occurring at two or more memory components, wherein each of the two or more error indicators is associated with a corresponding memory component of the two or more memory components;
detecting a correctable error occurring during a first memory fetch operation at a first memory component of the two or more memory components;
setting a first error indicator, of the two or more error indicators, corresponding to the first memory component, responsive to the correctable error at the first memory component;
detecting an uncorrectable error during a second memory fetch operation at a second memory component;
detecting that the first error indicator is set; and
taking offline at least one of the two or more memory components, responsive to the uncorrectable error and based on statuses of the two or more memory indicators, wherein the taking offline comprises:
taking offline the first memory component corresponding to the first error indicator, responsive to the first error indicator being set and responsive to the uncorrectable error occurring during the second memory fetch operation at the second memory component.