IP Library Granted Patent US 10,170,326
Granted Patent B2
US 10,170,326 · App. 15/811,111 · Granted Jan 1, 2019

Wafer element with an adjusted print resolution assist feature

Inventors: Yann A. Mignot (Slingerlands, NY); Muthumanickam Sankarapandian (Niskayuna, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L21/3081H01L21/0276H01L21/3086H01L21/31116H01L21/31138
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Quick Facts
Patent No.
US 10,170,326
App. No.
15/811,111
Granted
Jan 1, 2019
Kind
B2
Abstract

A wafer element fabrication method is provided. The wafer element fabrication method includes forming a device element on a substrate such that the device element includes an upper surface and a sidewall extending from the upper surface to the substrate. The wafer element fabrication method further includes forming an adjusted print resolution assist feature (APRAF) on the substrate such that the APRAF is smaller than the device element in at least one dimension. In addition, the wafer element fabrication method includes depositing surrounding material, which is different from materials of the APRAF, to surround the APRAF and to lie on the upper surface in abutment with the sidewall of the device element.

Claims (15)

1. A wafer element fabrication method, comprising:

patterning photoresist (PR) over an anti-reflective coating (ARC) disposed over a planarization layer (PL) and a substrate,

the patterning comprising forming the PR into PR device element and adjusted print resolution assist feature (APRAF) sections having first and second dimensions, respectively;

removing portions of the ARC and the PR device element and APRAF sections such that ARC device element and APRAF posts remain underneath remainders of the PR device element and APRAF sections having third and fourth dimensions based on the first and second dimensions, respectively;

removing the remainders of the PR device element and APRAF sections and portions of the PL such that PL device element and APRAF posts remain underneath the ARC device element and APRAF posts; and

removing the ARC device element and APRAF posts such that the PL device element and APRAF posts remain with fifth and sixth dimensions based on the third and fourth dimensions, respectively.

2. The wafer element fabrication method according to claim 1 , further comprising etching the substrate to thereby erode the PL device element and APRAF posts.

3. The wafer element fabrication method according to claim 2 , wherein the etching comprises:

etching the substrate into cones at locations of the PL APRAF posts; and

reducing a height of an upper surface of the substrate around the cones.

4. The wafer element fabrication method according to claim 3 , wherein the cones are at least one of formed in an open region and formed at an edge of a wafer.

5. The wafer element fabrication method according to claim 1 , wherein the patterning comprises:

forming a first portion of the PR into multiple PR device element sections having the first dimensions; and

forming a second portion of the PR into multiple PR APRAF sections having the second dimensions.

6. The wafer element fabrication method according to claim 1 , wherein the removing of the ARC device element and APRAF posts comprises ARC burn-off.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052644/0868 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2017
From: MIGNOT, YANN A.; SANKARAPANDIAN, MUTHUMANICKAM
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 044111/0729 →
Continuity (2)
Continuation 15495186 · Apr 24, 2017
Related Publication 20180308704A1 · Oct 25, 2018