IP Library › Granted Patent US 10,462,024
Granted Patent B1
US 10,462,024 · App. 15/813,968 · Granted Oct 29, 2019

State generation system for a sequential stage application

Inventors: Kyle Dennis Kavanagh (Chicago, IL); José Antonio Acuña-Rohter (Des Plaines, IL)
Assignee: Chicago Mercantile Exchange Inc.
H04L43/067G06F3/0484H04L43/0852H04L43/12
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Quick Facts
Patent No.
US 10,462,024
App. No.
15/813,968
Granted
Oct 29, 2019
Kind
B1
Abstract

A computer implemented method includes collecting, at a memory of a computing device having a processor, message processing latency information about processing electronic data transaction request messages over a timeframe by an application including a plurality of sequential stages; presenting, in a graphical user interface (GUI) rendered on a display coupled to the computing device, a digital dashboard, the digital dashboard displaying: for each stage, a stage box representing the stage positioned on a y-axis so as to represent a message processing latency associated with the stage over the timeframe; an inter-arrival message rate line positioned on the y-axis so as to represent an arrival rate between the electronic data transaction request messages over the timeframe; and an application box representing the application positioned on the y-axis so as to represent a message processing latency associated with the application over the timeframe; and in response to detecting a re-positioning of a stage box or the inter-arrival message rate line, displaying, on the digital dashboard, the application box at a different position associated with an expected message processing latency.

Claims (39)

1. A computer implemented method comprising:

collecting, at a memory of a computing device having a processor, by the processor, message processing latency information about processing electronic data transaction request messages over a timeframe by an application including a plurality of sequential stages;

presenting, by the processor, in a graphical user interface (GUI) rendered on a display coupled to the computing device, a digital dashboard, the digital dashboard displaying:

for each stage, a stage box representing the stage positioned on a y-axis so as to represent a message processing latency associated with the stage over the timeframe;

an inter-arrival message rate line positioned on the y-axis so as to represent an arrival rate between the electronic data transaction request messages over the timeframe; and

an application box representing the application positioned on the y-axis so as to represent a message processing latency associated with the application over the timeframe; and

in response to detecting a re-positioning of a stage box or the inter-arrival message rate line, displaying, by the processor, on the digital dashboard, the application box at a different position associated with an expected message processing latency.

2. The computer implemented method of claim 1 , wherein each stage is initially allocated an amount of computing resources, the method further comprising, in response to detecting a repositioning of a stage box, reallocating, by the processor, at least a portion of the computing resources amongst the stages based upon the movement.

3. The computer implemented method of claim 2 , wherein computing resources comprise processing cycles, processing threads, cores, or memory.

4. The computer implemented method of claim 2 , wherein if a stage box is re-positioned to be lower on the y-axis, the amount of computing resources allocated to the re-positioned stage box is increased.

5. The computer implemented method of claim 1 , wherein a height of a stage box and application box represents a message processing latency distribution associated with the corresponding stage or application.

6. The computer implemented method of claim 1 , wherein any portion of a stage box that is displayed above the inter-arrival message rate line preceding the stage box is highlighted to indicate a bottleneck.

7. The computer implemented method of claim 1 , wherein the expected message processing latency is determined based on the movement of the stage box or the inter-arrival message rate line.

8. The computer implemented method of claim 1 , wherein the positions of the stage boxes and the inter-arrival message rate line collectively define a state of the application, the method further comprising determining the expected message processing latency by providing a state of the application to a latency prediction system.

9. The computer implemented method of claim 8 , further comprising receiving information about the different position for the application box from the latency prediction system.

10. The computer implemented method of claim 9 , wherein the latency prediction system determines the expected message processing latency based on message processing latencies for previously processed electronic data transaction request messages.

11. A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to:

collect message processing latency information about processing electronic data transaction request messages over a timeframe by an application including a plurality of sequential stages;

present, in a graphical user interface (GUI) rendered on a display coupled to the processor, a digital dashboard, the digital dashboard displaying:

for each stage, a stage box representing the stage positioned on a y-axis so as to represent a message processing latency associated with the stage over the timeframe;

an inter-arrival message rate line positioned on the y-axis so as to represent an arrival rate between the electronic data transaction request messages over the timeframe; and

an application box representing the application positioned on the y-axis so as to represent a message processing latency associated with the application over the timeframe; and

in response to detecting a re-positioning of a stage box or the inter-arrival message rate line, display, on the digital dashboard, the application box at a different position associated with an expected message processing latency.

12. The non-transitory computer-readable medium of claim 11 , wherein each stage is initially allocated an amount of computing resources, and wherein the instructions are configured to cause the processor to, in response to detecting a repositioning of a stage box, reallocate at least a portion of the computing resources amongst the stages based upon the movement.

13. The non-transitory computer-readable medium of claim 12 , wherein computing resources comprise processing cycles, processing threads, cores, or memory.

14. The non-transitory computer-readable medium of claim 12 , wherein if a stage box is re-positioned to be lower on the y-axis, the amount of computing resources allocated to the re-positioned stage box is increased to achieve a latency associated with the re-positioned stage box.

15. The non-transitory computer-readable medium of claim 11 , wherein a height of a stage box and application box represents a message processing latency distribution associated with the corresponding stage or application.

16. The non-transitory computer-readable medium of claim 11 , wherein any portion of a stage box that is displayed above the inter-arrival message rate line preceding the stage box is highlighted to indicate a bottleneck.

17. The non-transitory computer-readable medium of claim 11 , wherein the expected message processing latency is determined based on the movement of the stage box or the inter-arrival message rate line.

18. The non-transitory computer-readable medium of claim 11 , wherein the positions of the stage boxes and the inter-arrival message rate line collectively define a state of the application, and wherein the instructions are configured to cause the processor to determine the expected message processing latency by providing a state of the application to a latency prediction system.

19. The non-transitory computer-readable medium of claim 18 , wherein the instructions are configured to cause the processor to receive information about the different position for the application box from the latency prediction system.

20. The non-transitory computer-readable medium of claim 19 , wherein the latency prediction system determines the expected message processing latency based on message processing latencies for previously processed electronic data transaction request messages.

21. A computer system comprising:

means for collecting message processing latency information about processing electronic data transaction request messages over a timeframe by an application including a plurality of sequential stages;

means for presenting a digital dashboard, the digital dashboard displaying:

for each stage, a stage box representing the stage positioned on a y-axis so as to represent a message processing latency associated with the stage over the timeframe;

an inter-arrival message rate line positioned on the y-axis so as to represent an arrival rate between the electronic data transaction request messages over the timeframe; and

an application box representing the application positioned on the y-axis so as to represent a message processing latency associated with the application over the timeframe; and

means for, in response to detecting a re-positioning of a stage box or the inter-arrival message rate line, displaying, on the digital dashboard, the application box at a different position associated with an expected message processing latency.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2018
From: ACUÑA-ROHTER, JOSÉ ANTONIO
To: CHICAGO MERCANTILE EXCHANGE INC.
Reel/Frame 047632/0037 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2017
From: KAVANAGH, KYLE DENNIS
To: CHICAGO MERCANTILE EXCHANGE INC.
Reel/Frame 044138/0493 →
Cited By (1)
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