IP Library Granted Patent US 10,629,431
Granted Patent B2
US 10,629,431 · App. 15/813,993 · Granted Apr 21, 2020

Method and structure for forming a dense array of single crystalline semiconductor nanocrystals

Inventors: Kangguo Cheng (Schenectady, NY); Hong He (Schenectady, NY); Juntao Li (Cohoes, NY)
Assignee: International Business Machines Corporation
H01L21/02488H01L21/02521H01L21/02601H01L21/02603H01L21/02667H01L21/31111H01L27/1203H01L29/0649H01L29/0665H01L29/0673H01L29/1054H01L29/1079H01L29/66439H01L29/66742H01L29/66772H01L29/775H01L29/78603H01L29/78654H01L29/78684H01L29/78696H01L29/42392
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Quick Facts
Patent No.
US 10,629,431
App. No.
15/813,993
Granted
Apr 21, 2020
Kind
B2
Abstract

A dense array of semiconductor single crystalline semiconductor nanocrystals is provided in the present application by forming an amorphous semiconductor material layer surrounding a plurality of patterned nanostructures comprised of a single crystalline semiconductor material portion. A thermal anneal, i.e., (solid phase epitaxy), is then performed to crystallize a portion of the amorphous semiconductor material layer that is in contact with each single crystalline semiconductor material portion and to provide a plurality of spaced apart single crystalline nanocrystals on a surface of an insulator. A remaining portion of the amorphous semiconductor material layer that was not crystallized is thereafter removed.

Claims (20)

1. A semiconductor structure comprising:

a plurality of spaced apart mesa structures extending upward from an insulator layer portion, wherein each of said mesa structures and said insulator layer portion are composed of a compositionally same dielectric material; and

a plurality of single crystalline semiconductor nanocrystals located above the insulator layer portion and spaced apart from each other, wherein an upper portion of each of said spaced apart mesa structures protrudes into, and is entirely embedded within, a lower portion of each of said single crystalline semiconductor nanocrystals.

2. The semiconductor structure of claim 1 , wherein each single crystalline semiconductor nanocrystal is a nanoball.

3. The semiconductor structure of claim 1 , wherein each single crystalline semiconductor nanocrystal is a nanorod.

4. The semiconductor structure of claim 1 , wherein each single crystalline semiconductor nanocrystal has a diameter of less than 20 nm.

5. The semiconductor structure of claim 1 , wherein each single crystalline semiconductor nanocrystal is spaced apart for its nearest neighboring single crystalline semiconductor nanocrystal by a distance of 20 nm or less.

6. The semiconductor structure of claim 1 , wherein each single crystalline semiconductor nanocrystal comprises a single semiconductor material.

7. The semiconductor structure of claim 1 , wherein each single crystalline semiconductor nanocrystal comprises a core of a first semiconductor material and a shell of a second semiconductor material, wherein said second semiconductor material differs from said first semiconductor material and a strain is present between said core and said shell.

8. The semiconductor structure of claim 1 , further comprising a gate dielectric material located on physically exposed portions of said insulator layer portion, each of said mesa structures, and each of said single crystalline semiconductor nanocrystals, and a gate conductor material located on the gate dielectric material.

9. A semiconductor structure comprising:

a plurality of spaced apart mesa structures extending upward from an insulator layer portion, wherein each of said mesa structures and said insulator layer portion are composed of a compositionally same dielectric material; and

a plurality of single crystalline semiconductor nanocrystals located above the insulator layer portion and spaced apart from each other, wherein each of said single crystalline semiconductor nanocrystals has a bottommost surface in directly physical contact with an entirety of a topmost surface of one of said spaced apart mesa structures.

10. The semiconductor structure of claim 9 , wherein each single crystalline semiconductor nanocrystal is a nanoball.

11. The semiconductor structure of claim 9 , wherein each single crystalline semiconductor nanocrystal is a nanorod.

12. The semiconductor structure of claim 9 , wherein each single crystalline semiconductor nanocrystal has a diameter of less than 20 nm.

13. The semiconductor structure of claim 9 , wherein each single crystalline semiconductor nanocrystal is spaced apart for its nearest neighboring single crystalline semiconductor nanocrystal by a distance of 20 nm or less.

14. The semiconductor structure of claim 9 , wherein each single crystalline semiconductor nanocrystal comprises a single semiconductor material.

15. The semiconductor structure of claim 9 , wherein each single crystalline semiconductor nanocrystal comprises a core of a first semiconductor material and a shell of a second semiconductor material, wherein said second semiconductor material differs from said first semiconductor material and a strain is present between said core and said shell.

16. The semiconductor structure of claim 9 , further comprising a gate dielectric material located on physically exposed portions of said insulator layer portion, each of said mesa structures, and each of said single crystalline semiconductor nanocrystals, and a gate conductor material located on the gate dielectric material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052557/0327 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2017
From: CHENG, KANGGUO; HE, HONG; LI, JUNTAO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 044138/0522 →
Continuity (2)
Division 14713099 · May 15, 2015
Related Publication 20180076029A1 · Mar 15, 2018