IP Library › Granted Patent US 10,672,696
Granted Patent B2
US 10,672,696 · App. 15/821,599 · Granted Jun 2, 2020

Semiconductor device package

Inventors: Jen-Kuang Fang (Kaohsiung, TW); Wen-Long Lu (Kaohsiung, TW)
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
H01L23/49833H01L23/3107H01L23/3128H01L24/16H01L24/48H01L24/49H01L24/73H01L24/85H01L24/92H01L21/565H01L24/13H01L24/78H01L2224/13101H01L2224/16145H01L2224/16227H01L2224/2919H01L2224/45111H01L2224/4809H01L2224/4824H01L2224/48091H01L2224/48145H01L2224/48157H01L2224/48227H01L2224/49052H01L2224/49109H01L2224/73204H01L2224/73265H01L2224/78301H01L2224/81815H01L2224/85181H01L2224/92125H01L2224/92127H01L2924/10253H01L2924/15151H01L2924/15192H01L2924/181H01L2924/18161
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,672,696
App. No.
15/821,599
Granted
Jun 2, 2020
Kind
B2
Abstract

A semiconductor device package includes an electronic component, a first substrate, a first bonding wire and a second substrate. The electronic component has a first surface. The first substrate is disposed on the first surface of the electronic component. The first bonding wire electrically connects the first substrate to the electronic component. The second substrate is disposed on the first surface of the electronic component. The second substrate defines an opening accommodating the first substrate and the first bonding wire.

Claims (46)

1. A semiconductor device package, comprising:

an electronic component having a first surface;

a first substrate disposed on the first surface of the electronic component;

a first bonding wire electrically connecting the first substrate to the electronic component;

a second substrate disposed on the first surface of the electronic component, the second substrate defining an opening accommodating the first substrate and the first bonding wire;

a second bonding wire electrically connecting the first substrate to the second substrate; and

a conductive bump disposed on the first surface of the electronic component, wherein the conductive bump electrically connects the first substrate to the electronic component.

2. The semiconductor device package of claim 1 ,

wherein the first bonding wire comprises a terminal connected to the electronic component;

wherein the first substrate has a lateral surface, the second substrate has a lateral surface facing the lateral surface of the first substrate; and

wherein a distance from the terminal to the lateral surface of the second substrate is smaller than a distance from the terminal to the lateral surface of the first substrate.

3. The semiconductor device package of claim 2 , wherein the terminal and a portion of the first bonding wire are disposed between the electronic component and the second substrate.

4. The semiconductor device package of claim 2 , wherein a portion of the first bonding wire is disposed between the lateral surface of the first substrate and lateral surface of the second substrate.

5. The semiconductor device package of claim 1 , wherein a thickness of the first substrate is different from a thickness of the second substrate.

6. The semiconductor device package of claim 1 , wherein a thickness of the first substrate is less than a thickness of the second substrate.

7. The semiconductor device package of claim 1 , wherein a lower surface of the first substrate and a lower surface of the second substrate are not coplanar.

8. The semiconductor device package of claim 1 , further comprising a package body encapsulating the first substrate, the second substrate, the electronic component, the first bonding wire and the second bonding wire.

9. The semiconductor device package of claim 1 , further comprising at least one electrical contact disposed on the second substrate.

10. The semiconductor device package of claim 1 , wherein a portion of the first bonding wire passes through the opening of the second substrate.

11. The semiconductor device package of claim 1 , wherein a portion of the first bonding wire passes through the second substrate.

12. A semiconductor device package, comprising:

an electronic component having a first surface;

a first substrate disposed on the first surface of the electronic component;

a first bonding wire electrically connecting the first substrate to the electronic component;

a second substrate disposed on the first surface of the electronic component, the second substrate surrounding the first substrate and being separated from the first substrate;

a second bonding wire electrically connecting the first substrate to the second substrate; and

a conductive bump disposed on the first surface of the electronic component, wherein the conductive bump electrically connects the first substrate to the electronic component.

13. The semiconductor device package of claim 12 ,

wherein the first bonding wire comprises a terminal connecting to the electronic component;

wherein the first substrate has a lateral surface, the second substrate has a lateral surface facing the lateral surface of the first substrate; and

wherein a distance from the terminal to the lateral surface of the second substrate is less than a distance from the terminal to the lateral surface of the first substrate.

14. The semiconductor device package of claim 13 , wherein the terminal and a portion of the first bonding wire are disposed between the electronic component and the second substrate.

15. The semiconductor device package of claim 12 , wherein the second substrate has a lower surface connected to the second bonding wire, and the first substrate has a lower surface that is not coplanar with the lower surface of the second substrate.

16. The semiconductor device package of claim 15 , wherein a distance between the lower surface of the first substrate and the first surface of the electronic component is less than a distance between the lower surface of the second substrate and the first surface of the electronic component.

17. The semiconductor device package of claim 12 , further comprising a package body encapsulating the first substrate, the second substrate, the electronic component, the first bonding wire and the second bonding wire.

18. The semiconductor device package of claim 12 , further comprising at least one electrical contact disposed on the second substrate.

19. The semiconductor device package of claim 12 , wherein a portion of the first bonding wire passes through the second substrate.

20. A method of manufacturing a semiconductor device package, comprising:

providing an electronic component, a first substrate comprising conductive bumps and a second substrate;

disposing the first substrate on the electronic component;

bonding a first wire to electrically connect the first substrate to the electronic component, such that the conductive bumps electrically connect the first substrate to the electronic component;

disposing the electronic component on the second substrate; and

bonding a second wire to electrically connect the second substrate to the first substrate.

21. The method of claim 20 , wherein disposing the electronic component on the second substrate comprises inserting the first substrate into an opening defined by the second substrate.

22. The method of claim 20 , wherein disposing the electronic component on the second substrate comprises covering a portion of the first wire so that the portion of the first wire is disposed between the electronic component and the second substrate.

23. The method of claim 20 , further comprising passing the first wire through the second substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2017
From: FANG, JEN-KUANG; LU, WEN-LONG
To: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Reel/Frame 044202/0859 →
Continuity (1)
Related Publication 20190157197A1 · May 23, 2019