Software-based self-test and diagnosis using on-chip memory
Embedded processor-based self-test and diagnosis using the compressed test data is described for ICs having on-chip memory. Techniques for compressing the test data before the compressed test data is transferred to a device under test (DUT) are also described. A modified LZ77 algorithm can be used to compress strings of test data in which don't care bits are handled by assigning a value to the don't care bits according to a longest match in the window as the data is being encoded. The compressed test data can be decompressed at the DUT using a software program transferred by the automated test equipment (ATE) to the DUT with the compressed test data. Decompression and diagnostics can be carried out at the DUT using an embedded processor and the on-chip memory. Results from the diagnostics can be read by the ATE.
1. An automatic test equipment (ATE) system comprising:
a device under test interface;
one or more computer readable media;
a testing program stored on the one or more computer readable media that, when executed by a processor of the ATE system, causes the processor to:
write a decompression program, a diagnosis program and compressed test data to an on-chip memory of a device under test (DUT) via the device under test interface; and
read a log file from the on-chip memory of the DUT; and
a compression program stored on the one or more computer readable media that, when executed by the processor of the ATE system, causes the processor to:
assign a value to a don't care bit in a buffer of a compression program before shifting one or more bits from the buffer to a sliding window of the compression program, the value to the don't care bit being a default value when the don't care bit is not being compressed and the value to the don't care bit being a match-bit value when the don't care bit is contained in a string in the buffer that is determined to be a longest matching string to a string in the sliding window,
wherein an output of the compression program provides the compressed test data.
2. The ATE system of claim 1 , wherein the testing program, when executed by the processor of the ATE system, causes the processor to further:
make a determination regarding a pass-fail status of the DUT based on data from the log file.
3. The ATE system of claim 1 , wherein the testing program, when executed by the processor of the ATE system, causes the processor to further:
perform a binning process using the log file from the on-chip memory of the DUT.
4. The ATE system of claim 1 , wherein the testing program, when executed by the processor of the ATE system, causes the processor to further:
perform a debug process using the log file from the on-chip memory of the DUT.
5. The ATE system of claim 1 , wherein the testing program, when executed by a processor of the ATE system, further causes the processor to:
write compressed expected test response data for the diagnosis program to the on-chip memory.
6. The ATE system of claim 5 , further comprising:
a second compression program stored on the one or more computer readable media that, when executed by the processor of the ATE system, causes the processor to:
compress expected test response data by applying Huffman codes to the expected test response data to generate encoded expected test response data and compressing the encoded expected test response data.
7. An automatic test equipment (ATE) system comprising:
a device under test interface;
one or more computer readable media;
a testing program stored on the one or more computer readable media that, when executed by a processor of the ATE system, causes the processor to:
write a decompression program, a diagnosis program and compressed test data to an on-chip memory of a device under test (DUT) via the device under test interface; and
read a log file from the on-chip memory of the DUT; and
a compression program stored on the one or more computer readable media that, when executed by the processor of the ATE system, causes the processor to:
receive a test pattern for a scan test of a logic die, the test pattern comprising at least one don't care bit;
serialize the test pattern to a string;
initialize a window of a first size and a buffer of a second size, wherein the string is shifted from the buffer to the window during an encoding of the test pattern, wherein the at least one don't care bit that is shifted from the buffer to the window during the encoding of the test pattern is substituted with a default value in the window when the at least one don't care bit is being encoded as an uncompressed symbol and substituted with a match-bit value in the window when the at least one don't care bit is being encoded as part of a compressed at least one symbol; and
perform the encoding of the test pattern, wherein any uncompressed symbols of the test pattern are each encoded and stored with a flag bit indicative of uncompressed data and a data bit, wherein any set of compressed at least one symbol of the test pattern is encoded and stored with a flag bit indicative of compressed data, offset bits, and size bits,
wherein the encoded test pattern contains the compressed test data.
8. The ATE system of claim 7 , wherein the testing program, when executed by the processor of the ATE system, causes the processor to further:
make a determination regarding a pass-fail status of the DUT based on data from the log file.
9. The ATE system of claim 7 , wherein the testing program, when executed by the processor of the ATE system, causes the processor to further:
perform a binning process using the log file from the on-chip memory of the DUT.
10. The ATE system of claim 7 , wherein the testing program, when executed by the processor of the ATE system, causes the processor to further:
perform a debug process using the log file from the on-chip memory of the DUT.
11. The ATE system of claim 7 , wherein the testing program, when executed by a processor of the ATE system, further causes the processor to:
write compressed expected test response data for the diagnosis program to the on-chip memory.
12. The ATE system of claim 11 , further comprising:
a second compression program stored on the one or more computer readable media that, when executed by the processor of the ATE system, causes the processor to:
compress expected test response data by applying Huffman codes to the expected test response data to generate encoded expected test result data and compressing the encoded expected test response data.
13. An automatic test equipment (ATE) system comprising:
a device under test interface;
one or more computer readable media;
a testing program stored on the one or more computer readable media that, when executed by a processor of the ATE system, causes the processor to:
write a decompression program, a diagnosis program, compressed test data, and compressed expected test response data for the diagnosis program to an on-chip memory of a device under test (DUT) via the device under test interface;
read a log file from the on-chip memory of the DUT; and
a second compression program stored on the one or more computer readable media that, when executed by the processor of the ATE system, causes the processor to:
compress expected test response data by applying Huffman codes to the expected test response data to generate encoded expected test response data and compressing the encoded expected test response data.
14. The ATE system of claim 13 , wherein the testing program, when executed by the processor of the ATE system, causes the processor to further:
make a determination regarding a pass-fail status of the DUT based on data from the log file.
15. The ATE system of claim 13 , wherein the testing program, when executed by the processor of the ATE system, causes the processor to further:
perform a binning process using the log file from the on-chip memory of the DUT.
16. The ATE system of claim 13 , wherein the testing program, when executed by the processor of the ATE system, causes the processor to further:
perform a debug process using the log file from the on-chip memory of the DUT.