Receiver with time-varying threshold voltage
A system for communicating information between circuits is described. A transmit circuit provides pulse-amplitude-modulation (PAM) signals via a communication channel to a receiver. A circuit in the receiver determines digital values from the received signals using a time-varying threshold voltage, which varies during the bit-time. This approach may compensate for inter-symbol interference (ISI) to increase the voltage and timing margins of the system.
1. A method of operation in an integrated circuit (IC) chip, comprising:
receiving from a serial link a serial stream of data bits, the data bits having logical values, wherein a given logical value is within a corresponding bit-duration;
generating a time-varying threshold voltage during the bit-duration;
resolving the logical values from the serial stream of data bits based at least on the time-varying threshold voltage;
storing an activation bit; and
selectively enabling or disabling the time-varying threshold voltage based at least on the stored activation bit.
2. The method of claim 1 , wherein the generating comprises:
varying the time-varying threshold voltage linearly with time during the bit-duration.
3. The method of claim 1 , wherein the generating comprises:
varying the time-varying threshold voltage non-linearly as a function of time.
4. The method of claim 1 , wherein the generating comprises:
generating the time-varying threshold voltage with a waveform that matches a portion of a pulse response of the serial link.
5. The method of claim 1 , further comprising:
receiving a clock signal via a clock input node;
wherein the generating comprises generating the time-varying threshold voltage based on the clock signal.
6. The method of claim 5 , wherein receiving the clock signal comprises:
receiving a source-synchronous clock signal via a communication channel.
7. The method of claim 1 , further comprising a first instance of:
integrating a difference between the received serial stream of data bits and the time-varying threshold voltage;
determining the logical values via a slicer circuit.
8. The method of claim 1 , further comprising a first instance of:
comparing the received serial stream of data bits and the time-varying threshold voltage; and
integrating a comparison result of the compared serial stream of data bits and the time-varying threshold voltage.
9. The method of claim 8 , wherein the integrating comprises:
gating the integrating by a windowing signal during the bit-duration.
10. The method of claim 1 , wherein the received serial stream of data bits are differential signals.
11. The method of claim 1 , wherein the received serial stream of data bits corresponds to multiple pulse-amplitude-modulation (multi-PAM) encoding of a data sequence.
12. The method of claim 1 , further comprising:
multiple slicers corresponding to different levels in the multi-PAM encoding, and
wherein time-varying threshold voltages for at least two of the slicers are different.
13. A method, comprising:
receiving a signal representing a series of logical values, wherein a given logical value is within a corresponding bit-duration;
generating a time-varying threshold voltage during the bit-duration; and
determining the logical values from the received signal based at least on the time-varying threshold voltage, wherein the determining includes two instances of:
comparing the received signal and a given time-varying threshold voltage in a pair of time-varying threshold voltages;
integrating a comparison result of the received signal and the given time-varying threshold voltage;
wherein the determining further comprises:
feeding back a stored digital value from an immediately preceding bit-duration; and
selecting an output from one of multiple slicers during a current bit-duration based at least on the stored digital value.
14. The method of claim 13 , wherein the determining is carried out in a double-data rate mode.
15. A method, comprising:
receiving via a serial link a 4-Pulse Amplitude Modulation (4-PAM) signal representing a series of logical values, wherein a given logical value is within a corresponding bit-duration;
generating four time-varying threshold voltages during the bit-duration; and
determining the logical values from the received 4-PAM signal based at least on the four time-varying threshold voltages, wherein the determining includes four instances of:
comparing the received signal and a given one of the four time-varying threshold voltages; and
integrating a comparison result of the received signal and the given time-varying threshold voltage.
16. The method of claim 15 , wherein the determining further comprises:
feeding back a stored digital value from an immediately preceding bit-duration; and
selecting an output from one of multiple slicers during a current bit-duration based at least on the stored digital value.
17. The method of claim 15 , wherein the generating comprises:
varying each of the four time-varying threshold voltages linearly with time during the bit-duration.
18. The method of claim 15 , wherein the generating comprises:
varying each of the four time-varying threshold voltages non-linearly as a function of time.
19. The method of claim 15 , wherein the generating comprises:
generating each of the four time-varying threshold voltages with a waveform that matches a portion of a pulse response of the serial link.
20. The method of claim 15 , further comprising:
receiving a clock signal via a clock input node;
wherein the generating comprises generating each of the four time-varying threshold voltages based on the clock signal.