Semiconductor device method of manufacture

1. A method of manufacturing a semiconductor device, the method comprising:

encapsulating a semiconductor die, a first set of through vias, and a reference via with an encapsulant;

exposing the first set of through vias and the reference via with a planarization process on a first side of the semiconductor die;

connecting the first set of through vias on a second side of the semiconductor die opposite the first side to a second semiconductor die; and

after the connecting the first set of through vias, exposing a first surface of the reference via with a singulation process.

2. The method of claim 1 , wherein the exposing the first surface of the reference via reduces a height of the reference via.

3. The method of claim 1 , wherein the exposing the first surface of the reference via exposes a sidewall of the reference via.

4. The method of claim 1 , further comprising forming a shield coating in electrical connection with the reference via.

5. The method of claim 4 , wherein the forming the shield coating forms at least two layers of material.

6. The method of claim 4 , wherein the forming the shield coating forms at least three layers of material.

7. A method of manufacturing a semiconductor device, the method comprising:

placing a semiconductor device adjacent to a first via and a second via;

encapsulating the semiconductor device, the first via, and the second via with an encapsulant;

planarizing the encapsulant, the first via, the second via, and the semiconductor device; and

reducing a first height of the second via without reducing a second height of the first via.

8. The method of claim 7 , wherein the reducing the first height of the second via is performed at least in part a sawing process.

9. The method of claim 7 , wherein the second height is between about 100 μm and about 300 μm.

10. The method of claim 9 , wherein the first height is between about 80 μm and about 250 μm.

11. The method of claim 10 , wherein the encapsulant has the second height.

12. The method of claim 7 , further comprising depositing an adhesive layer in physical contact with the second via.

13. The method of claim 12 , further comprising depositing a first metal layer in physical contact with the adhesive layer.

14. The method of claim 13 , further comprising depositing a second metal layer in physical contact with the first metal layer, the first metal layer comprising a different material than the second metal layer.

15. A method of manufacturing a semiconductor device, the method comprising:

attaching a first semiconductor device to first vias located within a first integrated fan out package, the first integrated fan out package further comprising a first semiconductor die;

attaching a second semiconductor device to second vias located within a second integrated fan out package;

applying an underfill material between the first semiconductor device and the second semiconductor device; and

singulating the underfill material, wherein the singulating the underfill material exposes third vias within the first integrated fan out package.

16. The method of claim 15 , wherein the singulating the underfill material exposes a sidewall of the third vias.

17. The method of claim 15 , wherein the singulating the underfill material reduces a height of the third vias.

18. The method of claim 15 , further comprising forming a shield coating over the third vias after the singulating the underfill material.

19. The method of claim 18 , wherein the forming the shield coating comprises:

forming a layer of titanium; and

forming a layer of copper over the layer of titanium.

20. The method of claim 19 , wherein the forming the shield coating further comprises forming a layer of nickel over the layer of copper.