IP Library Granted Patent US 10,134,851
Granted Patent B2
US 10,134,851 · App. 15/842,002 · Granted Nov 20, 2018

Tunnel barrier schottky

Inventors: Rongming Chu (Agoura Hills, CA); Yu Cao (Agoura Hills, CA); Zijian “Ray” Li (Thousand Oaks, CA); Adam J. Williams (Malibu, CA)
Assignee: HRL Laboratories, LLC
H01L29/205H01L29/66212H01L29/872H01L29/0619H01L29/2003
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Quick Facts
Patent No.
US 10,134,851
App. No.
15/842,002
Granted
Nov 20, 2018
Kind
B2
Abstract

A diode includes: a semiconductor substrate; a cathode metal layer contacting a bottom of the substrate; a semiconductor drift layer on the substrate; a graded aluminum gallium nitride (AlGaN) semiconductor barrier layer on the drift layer and having a larger bandgap than the drift layer, the barrier layer having a top surface and a bottom surface between the drift layer and the top surface, the barrier layer having an increasing aluminum composition from the bottom surface to the top surface; and an anode metal layer directly contacting the top surface of the barrier layer.

Claims (20)

1. A method of making a semiconductor structure, comprising:

forming a semiconductor drift layer on a semiconductor substrate;

forming a nitride semiconductor barrier layer on the drift layer, the barrier layer having a larger bandgap than the drift layer, the barrier layer having a top surface and a bottom surface between the drift layer and the top surface, the forming of the barrier layer comprising grading a composition of the barrier layer so that the bandgap of the barrier layer increases from a portion of the barrier layer near the bottom surface to a portion of the barrier layer near the top surface; and

forming an ion implantation region at a peripheral portion of the barrier layer, leaving a non-ion implanted region at a central portion of the barrier layer.

2. The method of claim 1 , further comprising:

forming an anode metal layer contacting a top surface of the barrier layer, completely covering the non-ion implanted region at the central portion of the barrier layer, and overlapping the ion implantation region at the peripheral portion of the barrier layer.

3. The method of claim 1 , further comprising:

forming an anode metal layer contacting the top surface of the barrier layer; and

forming a cathode metal layer contacting a bottom of the substrate.

4. The method of claim 3 , wherein

the barrier layer comprises aluminum gallium nitride (AIGaN), and

the forming of the barrier layer comprises grading a composition of the barrier layer so that a composition of aluminum in the barrier layer increases from a portion of the barrier layer near the bottom surface to a portion of the barrier layer near the top surface.

5. The method of claim 1 , wherein the forming of the barrier layer comprises forming the barrier layer contacting the drift layer.

6. The method of claim 1 , further comprising forming a second semiconductor drift layer on the drift layer.

7. The method of claim 6 , wherein the second semiconductor drift layer has a lower doping concentration than the drift layer.

8. A method of making a semiconductor structure, comprising:

forming a semiconductor drift layer on a semiconductor substrate;

forming a nitride semiconductor barrier layer on the drift layer, the barrier layer having a larger bandgap than the drift layer, the barrier layer having a top surface and a bottom surface between the drift layer and the top surface, the forming of the barrier layer comprising grading a composition of the barrier layer so that the bandgap of the barrier layer increases from a portion of the barrier layer near the bottom surface to a portion of the barrier layer near the top surface;

forming an ion implantation region at edges of the barrier layer, leaving a single non-ion implanted region at a central portion of the barrier layer, and

forming an anode metal layer contacting a top surface of the barrier layer, completely covering the single non-ion implanted region at the central portion of the barrier layer, and overlapping the ion implantation region at the edge portion of the barrier layer.

Assignments (2)
CONFIRMATORY LICENSE Recorded Aug 28, 2020
From: HRL LABORATORIES, LLC
To: U.S. DEPARTMENT OF ENERGY
Reel/Frame 053634/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2017
From: CHU, RONGMING; CAO, YU; LI, ZIJIAN; WILLIAMS, ADAM J.
To: HRL LABORATORIES, LLC
Reel/Frame 045727/0540 →
Continuity (3)
Division 15093710 · Apr 7, 2016
Provisional Application 62203749 · Aug 11, 2015
Related Publication 20180114837A1 · Apr 26, 2018