Fast start-up circuit for low power crystal oscillator
A method and apparatus for speeding up the start-up process of a crystal oscillator. The energy required for starting oscillations is inserted to the crystal by a stimulus in the form of a time-variant voltage or current pattern, either periodic or aperiodic. The stimulus is stopped after a pre-established period, then the oscillator continues to operate in its normal mode and completes the start-up process significantly faster, compared to a start-up process not comprising the above stimulus.
1. An electronic circuit, comprising:
a fast start-up circuit for purpose of speeding up a start-up of a crystal oscillators;
an amplifier comprising a common source amplification stage biased by a controllable current source;
a piezoelectric crystal and capacitors connected as a feedback network between the-output and the input of the amplifier in a manner that forms a crystal oscillator;
a circuitry that can alter the current flowing in a said amplifier;
a start-up pattern consisting of a time-variant stimulus that actively varies the current flowing in a said amplifier and thus inserts energy to the crystal;
wherein the spectral content of the time-variant pattern includes a frequency, or plurality of frequencies, close or identical to the natural oscillation frequency of the crystal;
a start-up pattern which doesn't require a monitor or detection of a signal strength.
2. The circuit from claim 1 , wherein the piezoelectric crystal and the capacitors are connected as a feedback network in a manner that forms a Pierce crystal oscillator.
3. The circuit from claim 1 , wherein the piezoelectric crystal and the capacitors are connected as a feedback network in a manner that forms a Colpitts crystal oscillator.
4. The circuit from claim 1 , wherein the piezoelectric crystal and the capacitors are connected as a feedback network in a manner that forms a Santos crystal oscillator.
5. The circuit from claim 1 , wherein a resistor is connected between the input and the output of the amplifier.
6. The circuit from claim 1 , wherein the control of the controllable current source comprises an analogue control.
7. The circuit from claim 1 , wherein the control of the controllable current source comprises a digital control.
8. The circuit of claim 1 , wherein the time-variant pattern is periodic.
9. An electronic circuit, comprising:
a fast start-up circuit for purpose of speeding up a start-up of a crystal oscillator;
an inverting amplifier;
a piezoelectric crystal and capacitors connected as a feedback network between the output and the input of the amplifier in a manner that forms a crystal oscillator;
a circuitry connected to the output of the amplifier that can alter the voltage at the output of a said amplifier;
a start-up pattern consisting of a time-variant stimulus that actively varies the voltage at the output of a said amplifier and thus inserts energy to the crystal;
wherein the spectral content of the time-variant pattern includes a frequency, or plurality of frequencies, close or identical to the natural oscillation frequency of the crystal;
a start-up pattern which doesn't require a monitor or detection of a signal strength;
a pair of power supply terminals for connection to the positive and negative voltages of a power source.
10. The circuit from claim 9 , wherein the piezoelectric crystal and the capacitors are connected as a feedback network in a manner that forms a Pierce crystal oscillator.
11. The circuit from claim 9 , wherein the piezoelectric crystal and the capacitors are connected as a feedback network in a manner that forms a Colpitts crystal oscillator.
12. The circuit from claim 9 , wherein the piezoelectric crystal and the capacitors are connected as a feedback network in a manner that forms a Santos crystal oscillator.
13. The circuit from claim 9 , wherein a resistor is connected between the input and the output of the amplifier.
14. The circuit from claim 9 , wherein the amplifier is realised as a common source stage.
15. The circuit from claim 9 , wherein the amplifier is realised as a complementary-MOS (CMOS) logic gate.
16. The circuit from claim 9 , wherein the circuitry that can alter the voltage at the output of the said amplifier consists of an n-channel transistor and a p-channel transistor, the drain nodes of both transistors are connected to the output of the amplifier, the source node of the n-channel transistor is connected to the negative supply terminal, the source node of the p-channel transistor is connected to the positive supply terminal, and the gate nodes of the n-channel and the p-channel transistors are connected to a circuitry that can generate a time-variant pattern.
17. The circuit of claim 9 , wherein the time-variant pattern is periodic.