Logic compatible RRAM structure and process

1. A device comprising:

a first dielectric layer disposed over a substrate, the first dielectric layer including a first portion spaced apart from a second portion such that a first region extends from the first portion to the second portion of the first dielectric layer;

a first electrode disposed within the first region and extending to over the first portion of the first dielectric layer such that the first electrode extends laterally over the first portion of the first dielectric layer by a first distance beyond the first region;

a resistive layer disposed within the first region over the first electrode;

a second electrode disposed over the resistive layer within the first region and extending to over the first portion of the first dielectric layer such that the second electrode extends laterally over the first portion of the first dielectric layer by a second distance beyond the first region, the second electrode including a first sidewall portion and an opposing second sidewall portion such that a second region extends from the first sidewall portion to the second sidewall portion of the second electrode; and

a second dielectric layer that includes a first portion disposed within the second region and a second portion that is disposed over the first portion of the first dielectric layer, the first portion of the second dielectric layer being closer to the substrate than the second portion of the second dielectric layer.

2. The device of claim 1 , wherein the first electrode extends from the first portion of the first dielectric layer to the second portion of the first dielectric layer.

3. The device of claim 2 , wherein the first electrode extends over the second portion of the first dielectric layer.

4. The device of claim 1 , wherein the resistive layer is further disposed over the second portion of the first dielectric layer such that the resistive layer extends laterally over the second portion of the first dielectric layer by a third distance beyond the first region.

5. The device of claim 1 , further comprising a conductive material disposed within the second region directly on the second electrode.

6. The device of claim 5 , wherein the second dielectric layer further includes a third portion disposed within the second region, and

wherein the conductive material is disposed between the first portion and the third portion of the second dielectric layer.

7. The device of claim 1 , further comprising a third dielectric layer disposed over the second dielectric layer and interfacing with the second electrode, the resistive layer, and first electrode.

8. A device comprising:

a first dielectric layer disposed over a substrate, the first dielectric layer including a first portion spaced apart from a second portion such that a first region is disposed between the first portion and the second portion of the first dielectric layer;

a first electrode including a first portion disposed within the first region and a second portion extending over the first portion of the first dielectric layer such that the first electrode extends laterally over the first portion of the first dielectric layer by a first distance beyond the first region, the first portion of the first electrode being at a first height and the second portion of the first electrode being at a second height that is different from the first height;

a metal oxide layer including a first portion disposed within the first region over the first portion of the first electrode and a second portion disposed over the second portion of the first electrode; and

a second electrode including a first portion disposed within the first region over the first portion of the metal oxide layer and a second portion disposed over the second portion of the metal oxide layer, the first portion of the second electrode being at a third height and the second portion of the second electrode being at a fourth height that is different from the third height and the second height.

9. The device of claim 8 , wherein the first electrode further includes a third portion disposed within the first region and a fourth portion extending over the second portion of the first dielectric layer such that the first electrode extends laterally over the second portion of the first dielectric layer by a second beyond the first region, the third portion of the first electrode being at the first height and the fourth portion of the first electrode being at the second height.

10. The device of claim 8 , further comprising a sidewall spacer disposed along a sidewall of the second electrode, the sidewall spacer physically contacting a top surface of the metal oxide layer, the top surface of the metal oxide layer facing away from the substrate.

11. The device of claim 8 , wherein the metal oxide layer includes a material selected from the group consisting of NiO, TiO, HfO, ZrO, ZnO, WO 3 , Al 2 O 3 , TaO, MoO, and CuO.

12. The device of claim 8 , wherein the metal oxide layer physically contacts the first electrode and the second electrode.

13. The device of claim 8 , wherein the first portion of the first dielectric layer has a first segment extending to a third height and a second segment extending to a fourth height that is different than the third height.

14. The device of claim 8 , wherein the second portion of the second electrode extends laterally over the first portion of the first dielectric layer by a second distance beyond the first region, the second distance being less than the first distance.

15. A method comprising:

forming a first dielectric layer having an opening over a substrate;

forming a first electrode layer within the opening and over the first dielectric layer;

forming a resistive layer within the opening and over the first electrode layer;

forming a second electrode layer over the resistive layer;

forming a second dielectric layer over the second electrode layer;

patterning the second electrode layer and the second dielectric layer such that a portion of at least one of the patterned second electrode layer and the patterned second dielectric layer extends laterally over the resistive layer by a first distance beyond a region defined by the opening; and

patterning the resistive layer and the first electrode layer such that a portion of at least one of the patterned resistive layer and the patterned first electrode layer extends laterally over the first dielectric layer by a second distance beyond the region defined by the opening, the second distance being different than the first distance.

16. The method of claim 15 , wherein each of the portions of the patterned second electrode layer and the patterned second dielectric layer extend laterally over the resistive layer by the first distance beyond the region defined by the opening, and

wherein each of the portions of the patterned resistive layer and the patterned first electrode layer extend laterally over the first dielectric layer by the second distance beyond the region defined by the opening.

17. The method of claim 16 , further comprising forming a sidewall spacer along a sidewall of the patterned second electrode layer and along a sidewall of the patterned second dielectric layer.

18. The method of claim 15 , wherein the resistive layer includes a metal oxide.

19. The method of claim 15 , wherein the first distance is greater than the second distance.

20. The method of claim 15 , further comprising forming a trench through the patterned second dielectric layer; and

forming a conductive material within the trench.