IP Library Granted Patent US 10,297,736
Granted Patent B2
US 10,297,736 · App. 15/853,845 · Granted May 21, 2019

Eutectic electrode structure of flip-chip LED chip and flip-chip LED chip

Inventors: Anhe He (Xiamen, CN); Suhui Lin (Xiamen, CN); Jiansen Zheng (Xiamen, CN); Kangwei Peng (Xiamen, CN); Xiaoxiong Lin (Xiamen, CN); Chenke Hsu (Xiamen, CN)
Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
H01L33/62H01L24/13H01L24/14H01L33/40H01L24/06H01L24/16H01L24/81H01L2224/0401H01L2224/06102H01L2224/13006H01L2224/13011H01L2224/13016H01L2224/13017H01L2224/13018H01L2224/13019H01L2224/13082H01L2224/14051H01L2224/16227H01L2224/81191H01L2224/81805H01L2225/06513H01L2924/12041H01L2924/37001H01L2933/0016
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,297,736
App. No.
15/853,845
Granted
May 21, 2019
Kind
B2
Abstract

A Flip-chip LED chip includes: a substrate; a first semiconductor layer; a second semiconductor layer; a local defect region over part of the second semiconductor layer, which extends downward to the first semiconductor layer; a first metal layer over part of the first semiconductor layer; a second metal layer over part of the second semiconductor layer; an insulating layer covering the first metal layer, the second metal layer, the second semiconductor layer and the first semiconductor layer in the local defect region, with opening structures over the first metal layer and the second metal layer respectively; an eutectic electrode structure over the insulating layer, including a first eutectic layer and a second eutectic layer at vertical direction, and a first-type electrode region and a second-type electrode region at horizontal direction. Poor packaging caused by high eutectic void content during eutectic bonding process can therefore be reduced.

Claims (38)

1. A eutectic electrode structure of a flip-chip LED chip, comprising a first eutectic layer and a second eutectic layer from bottom to up in a vertical direction, and having a first-type electrode region and a second-type electrode region in a horizontal direction, wherein an upper surface and a lower surface of the first eutectic layer are not flat, and an upper surface and a lower surface of the second eutectic layer are both flat, and wherein the upper surface of the second eutectic layer is higher than or is of equal height with the upper surface of the first eutectic layer to thereby form a flat eutectic plane.

2. The eutectic electrode structure of flip-chip LED chip of claim 1 , wherein the lower surface of the first eutectic layer contact with the flip-chip LED chip for current conduction.

3. A flip-chip LED chip, comprising:

a substrate;

a first semiconductor layer over the substrate;

a light emitting layer over the first semiconductor layer;

a second semiconductor layer over the light emitting layer;

a local defect region over part of the second semiconductor layer, which extends downward to the first semiconductor layer;

a first metal layer over part of the first semiconductor layer;

a second metal layer over part of the second semiconductor layer;

an insulating layer covering the first metal layer, the second metal layer, the second semiconductor layer and the first semiconductor layer in the local defect region, wherein, the insulating layer has opening structures over the first metal layer and the second metal layer respectively;

an eutectic electrode structure over the insulating layer with openings, wherein the eutectic electrode structure comprises a first eutectic layer and a second eutectic layer from bottom to up at vertical direction, and is divided into a first-type electrode region and a second-type electrode region at horizontal direction;

wherein an upper surface and a lower surface of the first eutectic layer are not flat, and an upper surface and a lower surface of the second eutectic layer are both flat;

and wherein the upper surface of the second eutectic layer is higher than or is of equal height with the upper surface of the first eutectic layer to thereby form a flat eutectic plane.

4. The flip-chip LED chip of claim 3 , wherein, the second eutectic layer in the first-type electrode region is of same height with the second eutectic layer in the second-type electrode region.

5. The flip-chip LED chip of claim 3 , wherein, the lower surface of the first eutectic layer contacts with the first metal layer and the second metal layer respectively for current conduction.

6. The flip-chip LED chip of claim 3 , wherein, the second eutectic layer do not overlap with the first metal layer and the second metal layer at vertical direction.

7. The flip-chip LED chip of claim 3 , wherein: a transparent conducting layer is formed over the second semiconductor layer.

8. The flip-chip LED chip of claim 3 , wherein, the first metal layer and the second metal layer are composed of metal bodies and metal spreading fingers, or the first metal layer and the second metal layer are metal bodies.

9. The flip-chip LED chip of claim 8 , wherein: the opening structure of the insulating layer is only over the metal body.

10. A light-emitting system comprising a plurality of flip-chip LED chips each including:

a substrate;

a first semiconductor layer over the substrate;

a light emitting layer over the first semiconductor layer;

a second semiconductor layer over the light emitting layer;

a local defect region over part of the second semiconductor layer, which extends downward to the first semiconductor layer;

a first metal layer over part of the first semiconductor layer;

a second metal layer over part of the second semiconductor layer;

an insulating layer covering the first metal layer, the second metal layer, the second semiconductor layer and the first semiconductor layer in the local defect region, wherein, the insulating layer has opening structures over the first metal layer and the second metal layer respectively;

an eutectic electrode structure over the insulating layer with openings, wherein, the eutectic electrode structure is composed of first eutectic layers and second eutectic layers from bottom to up at vertical direction, and is divided into a first-type electrode region and a second-type electrode region at horizontal direction;

wherein upper surfaces and lower surfaces of the first eutectic layers are not flat, and upper surfaces and lower surfaces of the second eutectic layers are both flat; and

wherein the upper surface of the second eutectic layer is higher than or is of equal height with the upper surface of the first eutectic layer to thereby form a flat eutectic plane.

11. The light-emitting system of claim 10 , wherein the lower surfaces of the first eutectic layers contact with the first metal layer and the second metal layer respectively for current conduction.

12. The light-emitting system of claim 10 , wherein the second eutectic layer in the first-type electrode region is of same height with the second eutectic layer in the second-type electrode region.

13. The light-emitting system of claim 10 , wherein the second eutectic layers do not overlap with the first metal layer and the second metal layer at vertical direction.

14. The light-emitting system of claim 10 , wherein the first metal layer and the second metal layer are composed of metal bodies and metal spreading fingers, or the first metal layer and the second metal layer are metal bodies.

15. The light-emitting system of claim 14 , wherein the opening structure of the insulating layer is only over the metal body.

16. The light-emitting system of claim 10 , wherein a transparent conducting layer is formed over the second semiconductor layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2023
From: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
To: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.
Reel/Frame 065302/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 24, 2017
From: HE, ANHE; LIN, SUHUI; ZHENG, JIANSEN; PENG, KANGWEI; LIN, XIAOXIONG; HSU, CHENKE
To: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 044475/0493 →
Priority Claims (1)
CN 2015 1 0655970 · Oct 13, 2015 · national
Continuity (2)
Continuation PCTCN2016097758 · Sep 1, 2016
Related Publication 20180123011A1 · May 3, 2018