Simplified block patterning with wet strippable hardmask for high-energy implantation
Semiconductor devices and methods of forming the same include forming a wet-strippable hardmask over semiconductor fins. The wet-strippable hardmask is anisotropically etched away in a first device region. At least one semiconductor fin is doped in the first device region. The wet-strippable hardmask is isotropically etched away in a second device region. Semiconductor devices are formed from the fins in the first and second device regions.
1. A method for forming a semiconductor device, comprising:
forming a wet-strippable hardmask over a plurality of semiconductor fins from a material selected from the group consisting of a carbon oxide comprising a metal and a carbon oxynitride comprising a metal;
anisotropically etching away the wet-strippable hardmask in a first device region;
doping at least one semiconductor fin in the first device region;
isotropically etching away the wet-strippable hardmask in a second device region; and
forming semiconductor devices from the plurality of fins in the first and second device regions.
2. The method of claim 1 , wherein the wet-strippable hardmask comprises a metallic element selected from the group consisting of titanium, hafnium, tungsten, and zirconium.
3. The method of claim 1 , wherein isotropically etching away the wet-strippable hardmask comprises a wet chemical etch.
4. The method of claim 3 , wherein the wet chemical etch is an etch in a solution of five parts deionized water, one part aqueous ammonium hydroxide, and one part aqueous hydrogen peroxide, at a temperature between about 20° C. and about 80° C. for about ten minutes.
5. The method of claim 1 , further comprising forming an organic planarizing layer over the semiconductor fins before forming the wet-strippable hardmask.
6. The method of claim 5 , further comprising removing the organic planarizing layer after isotropically etching away the wet-strippable hardmask in the second device region.
7. The method of claim 5 , further comprising anisotropically etching away the organic planarizing layer in the first device region after anisotropically etching away the wet-strippable hardmask in the first device region.
8. The method of claim 1 , wherein doping the at least one semiconductor fin in the first device region comprises a high-energy ion implantation doping process using implantation temperatures of about 300° C. or greater.
9. The method of claim 1 , further comprising repeating said forming, anisotropically etching, doping, and isotropically etching, with said repeated anisotropic etching and said repeated doping being performed in the second device region, and said repeated isotropic etching being performed in the first device region, wherein said repeated doping comprises doping at least one semiconductor fin in the second device region with a different dopant than a dopant which the at least one semiconductor fin the first device region is doped with.
10. The method of claim 1 , wherein forming semiconductor devices comprises:
forming source and drain structures on source and drain regions of at least one of the plurality of fins;
forming a gate stack on a channel region of the at least one of the plurality of fins;
forming an interlayer dielectric around the gate stack and source and drain structures; and
faulting electrical contacts to the source and drain structures and the gate stack.
11. A method for forming a semiconductor device, comprising:
forming a wet-strippable hardmask over a plurality of semiconductor fins, the wet-strippable hardmask being formed from a material selected from the group consisting of a metallic carbon oxide and a metallic carbon oxynitride comprising a metallic element selected from the group consisting of titanium, hafnium, tungsten, and zirconium;
anisotropically etching away the wet-strippable hardmask in a first device region;
doping at least one semiconductor fin in the first device region;
isotropically etching away the wet-strippable hardmask in a second device region with a wet chemical etch; and
forming semiconductor devices from the plurality of fins in the first and second device regions.
12. The method of claim 11 , wherein the wet chemical etch is an etch in a solution of five parts deionized water, one part aqueous ammonium hydroxide, and one part aqueous hydrogen peroxide, at a temperature between about 20° C. and about 80° C. for about ten minutes.
13. The method of claim 11 , further comprising forming an organic planarizing layer over the semiconductor fins before forming the wet-strippable hardmask.
14. The method of claim 13 , further comprising removing the organic planarizing layer after isotropically etching away the wet-strippable hardmask in the second device region.
15. The method of claim 13 , further comprising anisotropically etching away the organic planarizing layer in the first device region after anisotropically etching away the wet-strippable hardmask in the first device region.
16. The method of claim 11 , wherein doping the at least one semiconductor fin in the first device region comprises a high-energy ion implantation doping process using implantation temperatures of about 300° C. or greater.
17. The method of claim 11 , further comprising repeating said forming, anisotropically etching, doping, and isotropically etching, with said repeated anisotropic etching and said repeated doping being performed in the second device region, and said repeated isotropic etching being performed in the first device region, wherein said repeated doping comprises doping at least one semiconductor fin in the second device region with a different dopant than a dopant which the at least one semiconductor fin the first device region is doped with.
18. The method of claim 11 , wherein forming semiconductor devices comprises:
forming source and drain structures on source and drain regions of at least one of the plurality of fins;
forming a gate stack on a channel region of the at least one of the plurality of fins;
forming an interlayer dielectric around the gate stack and source and drain structures; and
forming electrical contacts to the source and drain structures and the gate stack.
19. A method for forming a semiconductor device, comprising:
forming an organic planarizing layer over a plurality of semiconductor fins;
forming a wet-strippable hardmask over the organic planarizing layer, the wet-strippable hardmask being formed from a material selected from the group consisting of a metallic carbon oxide and a metallic carbon oxynitride comprising a metallic element selected from the group consisting of titanium, hafnium, tungsten, and zirconium;
anisotropically etching away the wet-strippable hardmask in a first device region;
anisotropically etching away the organic planarizing layer in the first region;
doping at least one semiconductor fin in the first device region;
isotropically etching away the wet-strippable hardmask in a second device region with a wet chemical etch;
removing the organic planarizing layer in the second device region; and
forming semiconductor devices from the plurality of fins in the first and second device regions.