IP Library Patent Application 15857406
Patent Application
App. No. 15/857,406

MASS STORAGE DEVICE CAPABLE OF FINE GRAINED READ AND/OR WRITE OPERATIONS

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Quick Facts
Patent No.
US None
App. No.
15/857,406
Abstract

A mass storage device controller is described. The controller is to process first and second read requests received at an I/O interface of a mass storage device. The first read request includes a first logical block address. The first read request is to provide a first block stored within non volatile storage media of the mass storage device at the I/O interface. The first block is identified by the first logical block address. The second read request includes a second logical block address and specifies one or more bytes within a second block identified by the second block address and stored within the non volatile storage media. The second read request is to provide the one or more bytes at the I/O interface.

Claims (32)

1 . An apparatus, comprising:

a mass storage device controller to process first and second read requests received at an I/O interface of a mass storage device, the first read request including a first logical block address, the first read request to provide a first block stored within non volatile storage media of the mass storage device at the I/O interface, the first block identified by the first logical block address, the second read request including a second logical block address and specifying one or more bytes within a second block identified by the second block address and stored within the non volatile storage media, the second read request to provide the one or more bytes at the I/O interface.

2 . The apparatus of claim 1 wherein the first and second read requests are different commands.

3 . The apparatus of claim 1 wherein the first and second read requests are same commands with different input parameters.

4 . The apparatus of claim 1 wherein the non volatile storage media comprises FLASH memory chips.

5 . The apparatus of claim 1 wherein the one or more bytes comprises a single byte.

6 . The apparatus of claim 1 wherein the controller is further to process a third read request, the third read request including a third logical block address and specifying a contiguous plurality of bytes that begin within a third block identified by the third block address and stored within the non volatile storage media, the plurality of bytes extending into a next block within the non volatile storage media, the third read request to provide the plurality of bytes at the I/O interface.

7 . The apparatus of claim 1 wherein the controller is to process first and second write requests received at the I/O interface, the first write request including a third logical block address and a third block, the first write request to write the third block within the non volatile storage media, the second write request including a fourth logical block address and one or more bytes to be written within a fourth block identified by the fourth block address, the fourth write request to write the one or more byte within the fourth block within the non volatile storage media.

8 . A computing system, comprising:

one or more general purpose processing cores;

a main memory;

a memory controller between the one or more general purpose processing cores and the main memory;

a peripheral control hub coupled to the memory controller;

a mass storage device coupled to the peripheral control hub, the mass storage device comprising:

an I/O interface;

non volatile storage media;

a controller to process first and second read requests received at the I/O interface, the first read request including a first logical block address, the first read request to provide a first block stored within the non volatile storage media at the I/O interface, the first block identified by the first logical block address, the second read request including a second logical block address and specifying one or more bytes within a second block identified by the second block address and stored within the non volatile storage media, the second read request to provide the one or more bytes at the I/O interface.

9 . The mass storage device of claim 8 wherein the first and second read requests are different commands.

10 . The mass storage device of claim 8 wherein the first and second read requests are same commands with different input parameters.

11 . The mass storage device of claim 8 wherein the non volatile storage media comprises FLASH memory chips.

12 . The mass storage device of claim 8 wherein the one or more bytes comprises a single byte.

13 . The mass storage device of claim 8 wherein the controller is further to process a third read request, the third read request including a third logical block address and specifying a contiguous plurality of bytes that begin within a third block identified by the third block address and stored within the non volatile storage media, the plurality of bytes extending into a next block within the non volatile storage media, the third read request to provide the plurality of bytes at the I/O interface.

14 . The mass storage device of claim 8 wherein the controller is to process first and second write requests received at the I/O interface, the first write request including a third logical block address and a third block, the first write request to write the third block within the non volatile storage media, the second write request including a fourth logical block address and one or more bytes to be written within a fourth block identified by the fourth block address, the fourth write request to write the one or more byte within the fourth block within the non volatile storage media.

15 . A machine readable storage medium comprising stored program code that when processed by one or more processors of a computing system cause the computing system to perform a method, comprising:

sending a first command to a mass storage device to read a block from the mass storage device;

writing a page having information within the block into a main memory;

sending a second command to the mass storage device to write only a byte of information from the page to the block stored within the mass storage device.

16 . The machine readable medium of claim 15 wherein the method further comprises refraining from reading less than a second block of information from the mass storage device unless the second block's corresponding page is within the main memory.

17 . The machine readable medium of claim 15 further comprising sending a third command to the mass storage device to read only a byte of information from the block within the mass storage device.

18 . The machine readable medium of claim 15 wherein the first and second commands are different commands.

19 . The machine readable medium of claim 15 wherein the first and second commands are same commands with different input parameters.

20 . The machine readable medium of claim 19 wherein the input parameters specify an offset from a starting end of a block and a number of bytes.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2023
From: INTEL CORPORATION
To: INTEL NDTM US LLC
Reel/Frame 064928/0832 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2018
From: KHAN, JAWAD B.; TRIKA, SANJEEV N.; LOEWEN, MYRON; LI, PENG
To: INTEL CORPORATION
Reel/Frame 045321/0240 →