III-nitride nanowire LED with strain modified surface active region and method of making thereof

1. A nanowire device, comprising:

a III-nitride semiconductor nanowire core having an upper tip portion with sloped p-plane sidewalls and a lower portion having substantially vertical m-plane sidewalls; and

an indium containing III-nitride semiconductor first shell located radially around the semiconductor nanowire core;

wherein:

the first shell comprises an upper tip portion with sloped p-plane sidewalls located over the upper tip portion of the nanowire core, and a lower portion having substantially vertical m-plane sidewalls located over the lower portion of the nanowire core;

the first shell further comprises an eave region comprising a structural discontinuity from the p-plane in the upper tip portion of the first shell to the m-plane in the lower portion of the first shell; and

the eave region has a greater thickness than the upper tip portion of the first shell having the sloped p-plane sidewalls and the lower portion of the first shell having the substantially vertical m-plane sidewalls.

2. The device of claim 1 , wherein the device comprises a light emitting diode (LED) device and the first shell comprises an active region quantum well shell.

3. The device of claim 2 , wherein:

the upper tip portion of the first shell comprises a ring shaped region which surrounds an entire periphery of the upper tip portion of the nanowire core;

the lower portion of the first shell comprises a ring shaped region which surrounds an entire periphery of the lower portion of the nanowire core; and

the eave region comprises a ring shaped region which surrounds an entire periphery of a middle portion of the nanowire core between the upper tip portion and the lower portion of the nanowire core.

4. The device of claim 3 , wherein the active quantum well shell comprises an In(Al)GaN semiconductor quantum well shell.

5. The device of claim 1 , wherein:

the eave region thickness is 1.1 to 1.5 times greater than the thickness of the lower portion of the first shell having the substantially vertical m-plane sidewalls; and

the upper tip portion of the first shell having the sloped p-plane sidewalls is thinner than both the eave region and the lower portion of the first shell having the substantially vertical m-plane sidewalls.

6. The device of claim 5 , wherein the eave region is 12 to 20 nm thick, the upper tip portion of the first shell having the sloped p-plane sidewalls is 0.4 to 2 nm thick and the lower portion of the first shell having the substantially vertical m-plane sidewalls is 7 to 11 nm thick.

7. The device of claim 4 , wherein the LED has a 495 to 590 nm peak emission wavelength or a 591 to 650 nm peak emission wavelength.

8. The device of claim 7 , wherein the LED has an about 520 nm peak emission wavelength and the eave region contains about 20 atomic percent indium.

9. The device of claim 7 , wherein the LED has an about 610 nm peak emission wavelength and the eave region contains about 30 atomic percent indium.

10. The device of claim 2 , wherein:

the lower portion of the first shell has a non-uniform surface profile having at least 3 peaks;

each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley; and

each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley.

11. The device of claim 10 , further comprising a semiconductor second shell located radially between the semiconductor nanowire core and the first shell, wherein the second shell comprises an underlayer barrier shell of the active region quantum well or an underlayer shell located radially inward from the active region.

12. The device of claim 11 , wherein:

the second shell has a non-uniform surface profile having at least 3 peaks;

each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley; and

each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley.

13. The device of claim 2 , further comprising:

an insulating mask layer located over a semiconductor surface of a support, wherein the nanowire core comprises a first conductivity type semiconductor nanowire core extending substantially perpendicular from the semiconductor surface of the support through an opening in the insulating mask layer;

at least one second conductivity type semiconductor shell extending over and around the active region quantum well shell;

a first electrode layer that contacts the second conductivity type semiconductor shell; and

a second electrode layer which is electrically connects to the semiconductor nanowire core.

14. The device of claim 13 , wherein:

the first conductivity type comprises n-type;

the second conductivity type comprises p-type;

the support comprises an n-GaN or n-AlGaN n-type semiconductor buffer layer on a substrate;

the semiconductor nanowire core comprises an n-GaN nanowire core;

the active region quantum well shell comprises an InGaN shell between GaN barrier shells; and

the first electrode comprises a transparent conductive oxide (TCO).

15. A method of making a light emitting diode (LED) device, comprising:

forming a semiconductor nanowire core; and

forming a first shell radially around the semiconductor nanowire core, the first shell comprising an In(Al)GaN active region quantum well;

wherein:

the first shell comprises an upper tip portion with sloped p-plane sidewalls located over an upper tip portion of the nanowire core, and a lower portion having substantially vertical m-plane sidewalls located over a lower portion of the nanowire core;

the first shell further comprises an eave region comprising a structural discontinuity from the p-plane in the upper tip portion of the first shell to the m-plane in the lower portion of the first shell; and

the eave region has a greater thickness than the upper tip portion of the first shell having the sloped p-plane sidewalls and the lower portion of the first shell having the substantially vertical m-plane sidewalls.

16. The method of claim 15 , further comprising forming a second semiconductor shell radially around the semiconductor nanowire core prior to forming the first semiconductor shell.

17. The method of claim 15 , wherein the structural discontinuity creates a low energy surface for In—N bonds to relax and incorporate indium with a higher probability than on the lower portion of the first shell having substantially vertical m-plane sidewalls.

18. The method of claim 15 , wherein:

the upper tip portion of the first shell comprises a ring shaped region which surrounds an entire periphery of the upper tip portion of the nanowire core;

the lower portion of the first shell comprises a ring shaped region which surrounds an entire periphery of the lower portion of the nanowire core; and

the eave region comprises a ring shaped region which surrounds an entire periphery of a middle portion of the nanowire core between the upper tip portion and the lower portion of the nanowire core.

19. The method of claim 15 , wherein:

the eave region thickness is 1.1 to 1.5 times greater than the thickness of the lower portion of the first shell having the substantially vertical m-plane sidewalls; and

the upper tip portion of the first shell having the sloped p-plane sidewalls is thinner than both the eave region and the lower portion of the first shell having the substantially vertical m-plane sidewalls.

20. The method of claim 19 , wherein the eave region is 12 to 20 nm thick, the upper tip portion of the first shell having the sloped p-plane sidewalls is 0.4 to 2 nm thick and the lower portion of the first shell having the substantially vertical m-plane sidewalls is 7 to 11 nm thick.