IP Library Granted Patent US 10,256,244
Granted Patent B1
US 10,256,244 · App. 15/871,181 · Granted Apr 9, 2019

NAND flash memory with fast programming function

Inventor: Minyi Chen (San Jose, CA)
Assignee: GigaDevice Semiconductor (Beijing) Inc.
H01L27/11524G11C14/00G11C16/0441
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Quick Facts
Patent No.
US 10,256,244
App. No.
15/871,181
Granted
Apr 9, 2019
Kind
B1
Abstract

A NAND flash memory including a plurality of levels of cells and a plurality of bitlines. Each bitline corresponds to a plurality of program states, the program states include an Erase-state, a highest state and a plurality of middle states, wherein the bitline voltages of the middle states during programming are between the bitline voltage of the Erase-state and the bitline voltage of the highest state during programming, and the bitline voltages of the middle states during programming are different from each other. The bitline program voltages of middle states of a NAND flash memory are controlled, thus a higher initial programming voltage of wordlines can be set without causing over-programming on the middle states of the bitlines. Therefore, program time is saved, and the programming speed is increased to achieve a fast program function.

Claims (11)

1. A NAND flash memory, comprising:

a plurality of levels of cells;

a plurality of bitlines, wherein each bitline corresponds to a plurality of program states, the program states include an Erase-state, a highest state and a plurality of middle states, wherein bitline voltages of the middle states during programming are between a bitline voltage of the Erase-state and a bitline voltage of the highest state during programming, and the bitline voltages of the middle states during programming are different from each other;

wherein the NAND flash memory is a multi-level cell (MLC) flash memory, and the bitline voltage of the highest state during programming is 0 volt;

wherein the plurality of middle states include an A-state and a B-state, the bitline voltage of the A-state during programming is calculated by the formula

VBL=DVA *program loop;

wherein DVA and program loop are parameters preset in factory test.

2. The NAND flash memory according to claim 1 , wherein the bitline voltage of the B-state during programming is calculated by the formula

VBL=DVA *program loop− DVB;

wherein DVB is a fixed value preset in factory test.

3. The NAND flash memory according to claim 1 , wherein the NAND flash memory is a triple-level cell (TLC) flash memory or a quad-level cell (QLC) flash memory.

Assignments (3)
CHANGE OF NAME & ADDRESS Recorded Oct 13, 2022
From: GIGADEVICE SEMICONDUCTOR (BEIJING) INC.
To: GIGADEVICE SEMICONDUCTOR INC.
Reel/Frame 061668/0819 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2019
From: SHINE BRIGHT TECHNOLOGY LIMITED
To: GIGADEVICE SEMICONDUCTOR (BEIJING) INC.
Reel/Frame 048431/0733 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2018
From: CHEN, MINYI
To: SHINE BRIGHT TECHNOLOGY LIMITED
Reel/Frame 045072/0789 →