Semiconductor device and method of manufacturing the same

1. A semiconductor device, comprising:

a first fin-type field effect transistor (FinFET) comprising a first gate structure, the first gate structure comprising a first work function layer;

a second FinFET comprising a second gate structure, the second gate structure comprising a second work function layer; and

a third FinFET comprising a third gate structure, the third gate structure comprising a third work function layer, wherein the first, second, and third work function layers have different thicknesses,

at least one of the first work function layer, the second work function layer, and the third work function layer comprises a material layer having a base material and a dopant doped in the base material, wherein the dopant comprises Al, Ta, W, or a combination thereof.

2. The semiconductor device of claim 1 , wherein the material layer comprises a first layer disposed over a second layer, the second layer comprises the base material and the dopant doped in the base material, the base material comprises TiN, TaN, or a combination thereof, and the first layer comprises TiAl, TaAl, HfAl, or a combination thereof.

3. The semiconductor device of claim 2 , wherein the second layer comprises a single layer structure or a multilayer structure, the dopant is doped into at least one layer of the multilayer structure.

4. The semiconductor device of claim 2 , wherein the second layer has <200> crystal plane orientation or the second layer is amorphous.

5. The semiconductor device of claim 2 , wherein a thickness of the second layer increases in the order of the first work function layer, the second work function layer, the third work function layer.

6. The semiconductor device of claim 1 wherein the first, second, and third FinFETs are the same type, the type comprises N-type or P-type.

7. The semiconductor device of claim 1 , wherein the first FinFET is N-type FinFET, while a threshold voltage of the first FinFET increases as a thickness of the first work function layer increases.

8. The semiconductor device of claim 1 , wherein the first FinFET is P-type FinFET, while a threshold voltage of the first FinFET decreases as a thickness of the first work function layer increases.

9. A method of manufacturing a gate structure for a semiconductor device, comprising:

providing a substrate having a first region, a second region, and a third region;

forming a first gate structure having a first work function layer over the first region for a first fin-type field effect transistor (FinFET);

forming a second gate structure having a second work function layer over the second region for a second FinFET; and

forming a third gate structure having a third work function layer over the third region for a third FinFET, wherein the first, second, and third work function layers have different thicknesses,

wherein one of the first, second, and third work function layers is doped with a dopant in a base material by an atomic layer deposition (ALD) method, and the dopant comprises Al, Ta, W or a combination thereof.

10. The method of claim 9 , wherein the base material comprises TiN, TaN, or a combination thereof.

11. The method of claim 9 , wherein doping the one of the first, second, and third work function layers with the dopant in the base material by the ALD method comprises:

performing a first cycle to introduce a nitrogen precursor and a first metal precursor to form a metal nitride layer; and

performing a second cycle to introduce a second metal precursor on a surface of the metal nitride layer.

12. The method of claim 11 , wherein the nitrogen precursor comprises NH 3 , N 2 , N 2 O, or a combination thereof, the first metal precursor comprises TiCl 4 , TaCl 5 , or a combination thereof, the second metal precursor comprises trimethylaluminium (TMA), aluminium chloride (AlCl 3 ), triisobutylaluminum (TIBA, Al(CH 2 CH(CH 3 ) 2 ) 3 ), WF 6 , TaCl 5 , or a combination thereof.

13. The method of claim 11 , further comprising repeating the first cycle and the second cycle to achieve a thickness of the work function layer.

14. The method of claim 9 , wherein doping the one of the first, second, and third work function layers with the dopant in the base material by the ALD method comprises:

performing a first cycle to introduce a first nitrogen precursor and a first metal precursor to form a metal nitride layer; and

performing a third cycle to introduce a second nitrogen precursor and a second metal precursor on a surface of the metal nitride layer.

15. The method of claim 14 , wherein each of the first and second nitrogen precursors comprises NH 3 , N 2 , N 2 O, or a combination thereof, the first metal precursor comprises TiCl 4 , TaCl 5 , or a combination thereof, the second metal precursor comprises trimethylaluminium (TMA), aluminium chloride (AlCl 3 ), triisobutylaluminum (TIBA, Al(CH 2 CH(CH 3 ) 2 ) 3 ), WF C , TaCl 5 , or a combination thereof.

16. The method of claim 14 , further comprising repeating the first cycle and the third cycle to achieve a thickness of the one of the first, second, and third work function layers.

17. A semiconductor device, comprising:

a first n-type FinFET with a threshold voltage Vn 1 comprising a first gate structure, and the first gate structure comprising a first work function layer;

a second n-type FinFET with a threshold voltage Vn 2 comprising a second gate structure, and the second gate structure comprising a second work function layer;

a third n-type FinFET with a threshold voltage Vn 3 comprising a third gate structure, and the third gate structure comprising a third work function layer;

a first p-type FinFET with a threshold voltage Vp 1 comprising a fourth gate structure, and the fourth gate structure comprising a fourth work function layer;

a second p-type FinFET with a threshold voltage Vp 2 comprising a fifth gate structure and, and the fifth gate structure comprising a fifth work function layer; and

a third p-type FinFET with a threshold voltage Vp 3 comprising a sixth gate structure and, the sixth gate structure comprising a sixth work function layer, wherein:

Vn 1< Vn 2< Vn 3 and Vp 1< Vp 2< Vp 3,

at least one of the second work function layer, the third work function layer, the fourth work function layer, the fifth work function layer, and the sixth work function layer comprises a base material and a dopant doped in the base material, wherein the dopant comprises Al, Ta, W, or a combination thereof.

18. The semiconductor device of claim 17 , wherein the base material comprises TiN, TaN, or a combination thereof.

19. The semiconductor device of claim 17 , wherein:

the first work function layer comprises a first layer; and

each of the second to sixth work function layers comprises the first layer and a second layer, the first layer is disposed over the second layer, and the first layer and the second layer comprise different materials.

20. The semiconductor device of claim 17 , wherein thickness of the second layer increases in the order of the second work function layer, the third work function layer, the fourth work function layer, the fifth work function layer, and the sixth work function layer.