High light absorption structure for semiconductor image sensor

1. A semiconductor device operated for sensing incident light, the semiconductor device comprising:

a carrier;

a device layer on the carrier;

a semiconductor layer on the device layer, the semiconductor layer comprising a plurality of light-sensing regions, wherein the semiconductor layer has a first surface and a second surface opposite to the first surface that is adjacent to the device layer, and the second surface has a lattice plane which is tilted with respect to a basal plane, wherein each of the light-sensing regions of the semiconductor layer has a plurality of first pit portions and a plurality of second pit portions, the plurality of the first pit portions and the plurality of the second pit portions are arranged on the second surface, the plurality of the first pit portions are aligned along a first direction, and the plurality of the second pit portions are aligned along a second direction transverse to the first direction, and the first and second pit portions each resemble a triangular pyramid having a triangular base level with the second surface of the semiconductor layer, wherein when viewed from a plan view, each of the triangular bases has a first side, an apex opposite the first side, and second and third sides extending from the first side to the apex, and adjacent two of the triangular bases are separated by a distance decreasing from the apexes of the adjacent two of the triangular bases to the first sides of the adjacent two of the triangular bases, and the triangular pyramid has three triangular side surfaces respectively extending from the first, second, and third sides of the triangular base to a vertex which is disposed within the semiconductor layer; and

an integrally-formed dielectric material that has a first portion in the semiconductor layer to form a deep trench isolation (DTI) structure extending from the second surface of the semiconductor layer towards the first surface of the semiconductor layer, a second portion over the first pit portions and the second pit portions, and a third portion interconnecting the second portion and the first portion.

2. The semiconductor device of claim 1 , further comprising a plurality of isolation structures disposed in the semiconductor layer to define a plurality of pixel regions, wherein each of the pixel regions comprises one of the light-sensing regions.

3. The semiconductor device of claim 2 , wherein the lattice plane of the second surface of the semiconductor layer is one of a {111} family of planes of a cubic system.

4. The semiconductor device of claim 3 , wherein each of the pixel regions is a rectangular region, and the first side of the triangular base of each of the first and second pit portions is parallel to two opposite edges of each of the pixel regions.

5. The semiconductor device of claim 1 , further comprising:

a first passivation layer disposed on the carrier;

an inter-metal dielectric layer disposed over the first passivation layer;

a buffer layer overlying the integrally-formed dielectric material;

a metal grid layer disposed on portions of the buffer layer; and

a second passivation layer covering the metal grid layer and the buffer layer.

6. The semiconductor device of claim 1 , wherein the integrally-formed dielectric material includes silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, or combinations thereof.

7. The semiconductor device of claim 1 , wherein the vertex of the triangular pyramid is higher than a top of one of the light-sensing region.

8. The semiconductor device of claim 1 , wherein the vertex of the triangular pyramid is lower than the second surface of the semiconductor layer.

9. The semiconductor device of claim 1 , wherein the vertex of the triangular pyramid is in contact with the second portion of the integrally-formed dielectric material.

10. An image sensor comprising:

a device layer including at least one device;

a pixel region including a light-sensing region above the device layer and a plurality of pit portions above the light-sensing region, wherein first pit portions of the plurality of the pit portions are aligned along a first direction, and second pit portions of the plurality of the pit portions are aligned along a second direction transverse to the first direction, and the pit portions each resemble a triangular pyramid having a triangular base, wherein when viewed from a plan view, each of the triangular bases has a first side, an apex opposite the first side, and second and third sides extending from the first side to the apex, and adjacent two of the triangular bases are separated by a distance decreasing from the apexes of the adjacent two of the triangular bases to the first sides of the adjacent two of the triangular bases, and the triangular pyramid has three triangular side surfaces respectively extending from the first, second, and third sides of the triangular base to a vertex, the first side of the triangular base is parallel to the first direction, and the second and third sides of the triangular base are non-parallel to the first and second directions; and

a deep trench isolation (DTI) structure surrounding the pixel region, wherein the at least one device is directly beneath the DTI structure.

11. The image sensor of claim 10 , wherein the at least one of the pit portions tapers toward the light-sensing region.

12. The image sensor of claim 10 , wherein the first side of the triangular base is parallel to an edge of the pixel region.

13. The image sensor of claim 10 , wherein the second and third sides of each of the triangular bases are non-parallel to the first direction.

14. The image sensor of claim 10 , wherein the second and third sides of each of the triangular bases are non-parallel to the second direction.

15. The image sensor of claim 10 , wherein when viewed from the plan view, the vertex of the triangular pyramid is between the apex and the first side of the triangular base.

16. An image sensor comprising:

a device layer including a plurality of devices;

a semiconductor layer on the device layer and including a pixel region including a light-sensing region above the device layer and a plurality of pit portions above the light-sensing region, wherein first pit portions of the plurality of the pit portions are aligned along a first direction, and second pit portions of the plurality of the pit portions are aligned along a second direction transverse to the first direction, and the first and second pit portions each resemble a triangular pyramid having a triangular base, wherein when viewed from a plan view, each of the triangular bases has a first side, an apex opposite the first side, and second and third sides extending from the first side to the apex, and adjacent two of the triangular bases are separated by a distance decreasing from the apexes of the adjacent two of the triangular bases to the first sides of the adjacent two of the triangular bases; and

an integrally-formed dielectric material surrounding the pixel region to form a deep trench isolation (DTI) structure, wherein a topmost portion of the integrally-formed dielectric material is higher than a topmost portion of the semiconductor layer, and a bottommost portion of the integrally-formed dielectric material is lower than the topmost portion of the semiconductor layer.

17. The image sensor of claim 16 , wherein each of the first sides of the triangular bases is parallel to an edge of the pixel region.

18. The image sensor of claim 16 , wherein the apexes of the first pit portions are aligned along the first direction.

19. The image sensor of claim 16 , wherein the apexes of the second pit portions are aligned along the second direction.

20. The image sensor of claim 16 , wherein the triangular pyramid has three triangular side surfaces respectively extending from first, second, and third sides of the triangular base to a vertex that is below the apex of the triangular base.