Systems and methods for quantum computation using random compiling
Systems and methods for executing a quantum computation comprising a plurality gates on a quantum information processor are provided. An initial quantum-logic gate sequence comprising the plurality of gates is received. Then, for each instance in a plurality of instances, a procedure is performed. In each instance of the procedure a respective modified quantum-logic gate sequence is generated by applying a virtual random gate to a first single-qubit gate in the plurality of gates. The respective modified quantum-logic gate sequence is then executed on the quantum device to obtain a respective outcome. The respective outcome across the plurality of instances of the procedure is averaged to obtain a noise-tailored outcome for the initial quantum-logic gate sequence.
1. A system comprising:
a quantum device comprising a quantum information processor; and
one or more data processors configured to perform a method comprising:
(A) receiving an initial quantum-logic gate sequence comprising a plurality of gates, wherein the initial quantum-logic gate sequence is organized into a temporal series of cycles including a k−1 cycle and a k cycle, wherein the k−1 cycle temporally precedes the k cycle;
(B) for each respective instance in a plurality of instances, executing a procedure comprising:
(i) generating a respective modified quantum-logic gate sequence from the initial quantum-logic gate sequence, the respective modified quantum-logic gate comprising (i) a n−1 corresponding cycle representing the k−1 cycle and (ii) an n corresponding cycle representing the k cycle of the initial quantum-logic gate sequence, wherein
the n−1 corresponding cycle of the respective modified quantum-logic gate sequence is formed, at least in part, by applying a first virtual random gate to a first gate in the k−1 cycle of the initial quantum-logic gate sequence,
the n corresponding cycle of the respective modified quantum-logic gate sequence is formed, at least in part, by applying a second virtual random gate to a second gate in the k cycle of the initial quantum-logic gate sequence,
the first virtual random gate consists of a first random single qubit gate or a combination of the first random single qubit gate and a first correction gate, and
the second virtual random gate comprises a combination of (1) a second correction gate that inverts the first random single qubit gate and (2) a second random single qubit gate, and
(ii) executing the respective modified quantum-logic gate sequence on the quantum device to obtain a respective outcome; and
(C) averaging the respective outcome across the plurality of instances to obtain a noise-tailored outcome for the initial quantum-logic gate sequence.
2. The system of claim 1 , wherein
the first cycle includes two or more of the plurality of gates,
the second cycle includes two or more of the plurality of gates, and
at least one gate in the plurality of gates is a non-Clifford gate.
3. The system of claim 1 , wherein the second correction gate inverts the first random single qubit gate upon commutation through a second gate, wherein the second gate is present in both the n−1 cycle of the respective modified quantum-logic gate sequence and the k−1 cycle of the initial quantum-logic gate sequence.
4. The system of claim 3 , wherein the second gate is a two-qubit gate.
5. The system of claim 1 , wherein the k−1 cycle includes a plurality of single qubit gates, wherein each single qubit gate in the plurality of single qubit gates is applied to a different qubit in the quantum information processor during the first cycle.
6. The system of claim 1 , wherein the n−1 corresponding cycle includes a plurality of single qubit gates, wherein each single qubit gate in the plurality of single qubit gates is applied to a different qubit in the quantum information processor during the first corresponding cycle.
7. The system of claim 1 , wherein
the temporal series of cycles further includes a k+1 cycle, wherein the k cycle temporally precedes the k+1 cycle,
the respective modified quantum-logic gate sequence further comprises (i) a n+1 corresponding cycle representing the k+1 cycle of the initial quantum-logic gate sequence;
the n+1 corresponding cycle of the respective modified quantum-logic gate sequence is formed by applying a third virtual random gate to a third single qubit gate in the k+1 cycle of the initial quantum-logic gate sequence; and
the third virtual random gate comprises a combination of (i) a third correction gate that inverts the second random single qubit gate and (ii) a third random single qubit gate.
8. The system of claim 7 , wherein the third correction gate inverts the second random single qubit gate upon commutation through a third gate, wherein the third gate is present in both the n corresponding cycle of the respective modified quantum-logic gate sequence and the k cycle of the initial quantum-logic gate sequence.
9. The system of claim 8 , wherein the third gate is a two-qubit gate.
10. The system of claim 1 , wherein the plurality of instances is at least 1000 instances.
11. The system of claim 1 , wherein
the k cycle includes two or more of the plurality of gates;
the k−1 cycle includes two or more of the plurality of gates not in the k cycle;
the first gate is a first single-qubit gate {right arrow over (C)} k in the k cycle and is replaced by the generating (B)(i) in the respective modified quantum-logic gate sequence with a randomized dressed gate {tilde over (C)} k , wherein
{right arrow over (C)} k ={right arrow over (T)} k {right arrow over (C)} k {right arrow over (T)} k−1 c
and wherein
{right arrow over (T)} k =is a first correction gate that is randomly selected from a twirling set T of gates,
{right arrow over (T)} k−1 c =G k−1 {right arrow over (T)} k−1 † G k−1 † ,
{right arrow over (T)} k−1 † =an inverse of a second correction gate {right arrow over (T)} k−1 that is randomly selected from the twirling set T of gates, wherein {right arrow over (T)} k−1 is applied to a second gate {right arrow over (C)} k−1 in the k−1 cycle,
G k−1 is a gate in the k−1 cycle other than {right arrow over (C)} k−1 or a product of two or more gates in the k−1 cycle other than {right arrow over (C)} k−1 ,
G k−1 † is the inverse of G k−1 ,
the first gate {right arrow over (C)} k in the k cycle and the second gate {right arrow over (C)} k−1 in the k−1 cycle are members of a set C,
the first correction gate {right arrow over (T)} k and the second correction gate {right arrow over (T)} k−1 are members of a set T, and
the set T is subset of C ⊗n .
12. The system of claim 11 , wherein
the first gate {right arrow over (C)} k in the k cycle is a single-qubit Pauli gate in the set {I, X, Y, Z} or a R=|0 0|+i|1 1|,
the second gate {right arrow over (C)} k−1 in the k−1 cycle is a single-qubit Pauli gate in the set {I, X, Y, Z} or a R=|0 0|+i|1 1|,
G k−1 comprises a Hardamard gate H, the π/8 gate √{square root over (R)}, or the two-qubit controlled-Z gate Δ(Z)=|0 0|⊗I+|0 0|⊗Z, and
G k comprises a Hardamard gate H, the π/8 gate √{square root over (R)}, or the two-qubit controlled-Z gate Δ(Z)=|0 0|237 I+|0 0|⊗Z.
13. The system of claim 11 , wherein
the first gate {right arrow over (C)} k in the k cycle is a gate that does not exhibit gate dependent error when implemented on the quantum information processor, and
the second gate {right arrow over (C)} k−1 in the k−1 cycle is a gate that does not exhibit gate dependent error when implemented on the quantum information processor.
14. The system of claim 11 , wherein
the first gate {right arrow over (C)} k in the k cycle is a gate that exhibits gate dependent error when implemented on the quantum information processor, and
the second gate {right arrow over (C)} k−1 in the k−1 cycle is a gate that exhibits gate dependent error when implemented on the quantum information processor.
15. The system of claim 14 , wherein the set T is normalized by the set C such that CTC † ∈T, wherein C is a first gate in the set C and C † is the logical inverse of the first gate.
16. The system of claim 11 , wherein the randomized dressed gate {tilde over (C)} k is one or more elementary gates directly implemented on the quantum information processor as part of the executing the respective modified quantum-logic gate sequence.
17. The system of claim 11 , wherein G k−1 is a product of two or more gates in the k−1 cycle other than {right arrow over (C)} k−1 .
18. The system of claim 11 , wherein G k−1 comprises a two-qubit gate.
19. The system of claim 1 , wherein the first gate in the k−1 cycle of the initial quantum-logic gate sequence is configured to act on one or more qubits of the quantum device.
20. A method comprising:
at a computer system comprising one or more data processors and a memory, the memory comprising non-transitory instructions configured to perform instructions that:
(A) receive an initial quantum-logic gate sequence comprising a plurality of gates, wherein the initial quantum-logic gate sequence is organized into a temporal series of cycles including a k−1 cycle and a k cycle, wherein the k−1 cycle temporally precedes the k cycle;
(B) for each respective instance in a plurality of instances, execute a procedure comprising:
(i) generating a respective modified quantum-logic gate sequence from the initial quantum-logic gate sequence, the respective modified quantum-logic gate comprising (i) a n−1 corresponding cycle representing the k−1 cycle and (ii) a n corresponding cycle representing the k cycle of the initial quantum-logic gate sequence, wherein
the n−1 corresponding cycle of the respective modified quantum-logic gate sequence is formed, at least in part, by applying a first virtual random gate to a first gate in the k−1 cycle of the initial quantum-logic gate sequence,
the n corresponding cycle of the respective modified quantum-logic gate sequence is formed, at least in part, by applying a second virtual random gate to a second gate in the k cycle of the initial quantum-logic gate sequence,
the first virtual random gate consists of a first random single qubit gate or a combination of the first random single qubit gate and a first correction gate, and
the second virtual random gate comprises a combination of (1) a second correction gate that inverts the first random single qubit gate and (2) a second random single qubit gate, and
(ii) executing the respective modified quantum-logic gate sequence on a quantum device to obtain a respective outcome; and
(C) average the respective outcome across the plurality of instances to obtain a noise-tailored outcome for the initial quantum-logic gate sequence.
21. The method of claim 20 , wherein
the k cycle includes two or more of the plurality of gates;
the k−1 cycle includes two or more of the plurality of gates not in the k cycle;
the first gate is a first single-qubit gate {right arrow over (C)} k in the k cycle and replaced by the generating (B)(i) in the respective modified quantum-logic gate sequence with a randomized dressed gate {tilde over (C)} k , wherein
{tilde over (C)} k ={right arrow over (T)} k {right arrow over (C)} k {right arrow over (T)} k−1 c
and wherein
{right arrow over (T)} k is a first correction gate that is randomly selected from a twirling set T of gates,
{right arrow over (T)} k−1 c =G k−1 {right arrow over (T)} k−1 † G k−1 † ,
{right arrow over (T)} k−1 † =an inverse of a second correction gate {right arrow over (T)} k−1 that is randomly selected from the twirling set T of gates, wherein {right arrow over (T)} k−1 is applied to a second gate {right arrow over (C)} k−1 in the k−1 cycle,
G k−1 is a gate in the k−1 cycle other than {right arrow over (C)} k−1 or a product of two or more gates in the k−1 cycle other than {right arrow over (C)} k−1 ,
G k−1 † is the inverse of G k−1 ,
the first gate {right arrow over (C)} k in the k cycle and the second gate {right arrow over (C)} k−1 in the k−1 cycle are members of a set C,
the first correction gate {right arrow over (T)} k and the second correction gate {right arrow over (T)} k−1 are members of a set T, and
the set T is subset of C ⊗n .
22. The method of claim 20 , wherein at least one gate in the plurality of gates is a non-Clifford gate.
23. A non-transitory computer readable storage medium storing one or more programs, the one or more programs comprising instructions, which when executed by a computer system with one or more processors, cause the computer system to:
(A) receive an initial quantum-logic gate sequence comprising a plurality of gates, wherein the initial quantum-logic gate sequence is organized into a temporal series of cycles including a k−1 cycle and a k cycle, wherein the k−1 cycle temporally precedes the k cycle;
(B) for each respective instance in a plurality of instances, execute a procedure comprising:
(i) generating a respective modified quantum-logic gate sequence from the initial quantum-logic gate sequence, the respective modified quantum-logic gate comprising (i) a n−1 corresponding cycle representing the k−1 cycle and (ii) a n corresponding cycle representing the k cycle of the initial quantum-logic gate sequence, wherein
the n−1 corresponding cycle of the respective modified quantum-logic gate sequence is formed, at least in part, by applying a first virtual random gate to a first gate in the k−1 cycle of the initial quantum-logic gate sequence,
the n corresponding cycle of the respective modified quantum-logic gate sequence is formed, at least in part, by applying a second virtual random gate to a second gate in the k cycle of the initial quantum-logic gate sequence,
the first virtual random gate consists of a first random single qubit gate or a combination of the first random single qubit gate and a first correction gate, and
the second virtual random gate comprises a combination of (1) a second correction gate that inverts the first random single qubit gate and (2) a second random single qubit gate, and
(ii) executing the respective modified quantum-logic gate sequence on a quantum device to obtain a respective outcome; and
(C) average the respective outcome across the plurality of instances to obtain a noise-tailored outcome for the initial quantum-logic gate sequence.
24. The non-transitory computer readable storage medium of claim 23 , wherein
the k cycle includes two or more of the plurality of gates;
the k−1 cycle includes two or more of the plurality of gates not in the k cycle;
the first gate is a first single-qubit gate {right arrow over (C)} k in the k cycle and replaced by the generating (B)(i) in the respective modified quantum-logic gate sequence with a randomized dressed gate {tilde over (C)} k , wherein
{tilde over (C)} k ={right arrow over (T)} k {right arrow over (C)} k {right arrow over (T)} k−1 c
and wherein
{right arrow over (T)} k is a first correction gate that is randomly selected from a twirling set T of gates,
{right arrow over (T)} k−1 c =G k−1 {right arrow over (T)} k−1 † G k−1 † ,
{right arrow over (T)} k−1 † =an inverse of a second correction gate {right arrow over (T)} k−1 that is randomly selected from the twirling set T of gates, wherein {right arrow over (T)} k−1 is applied to a second gate {right arrow over (C)} k−1 in the k−1 cycle,
G k−1 is a gate in the k−1 cycle other than {right arrow over (C)} k−1 or a product of two or more gates in the k−1 cycle other than {right arrow over (C)} k−1 ,
G k−1 † is the inverse of G k−1 ,
the first gate {right arrow over (C)} k in the k cycle and the second gate {right arrow over (C)} k−1 in the k−1 cycle are members of a set C,
the first correction gate {right arrow over (T)} k and the second correction gate {right arrow over (T)} k−1 are members of a set T, and
the set T is subset of C ⊗n .
25. The non-transitory computer readable storage medium of claim 23 , wherein at least one gate in the plurality of gates is a non-Clifford gate.